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AMD Geode LX 800@0.9W處理器 II
Display Controller" ?; N5 z1 t* ^( ?7 \
■ Hardware frame buffer compression improves Unified
& c+ S3 a8 V) vMemory Architecture (UMA) memory efficiency
( m. I: k$ Y0 h4 ?0 W# ]* ~& _7 {■ CRT resolutions supported:
, U! n2 V+ O* G; m/ a& `1 ?5 ~— Supports up to 1920x1440x32 bpp at 85 Hz
: H) ], P2 Z0 Z8 r! F) v— Supports up to 1600x1200x32 bpp at 100 Hz. k) A+ c# R, w/ Z5 B0 \8 X+ S f
■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT! t0 g" k. D# h8 x' ~
■ Standard Definition (SD) resolution for Video Output% _$ n4 E* |1 R
Port (VOP):
/ m4 K0 o" V% U+ h4 n— 720x482 at 59.94 Hz interlaced for NTSC# a. A, x& }3 L6 ?9 e% D
— 768x576 at 50 Hz interlaced for PAL5 v- N! E0 s; D5 H- n7 W7 w+ a ?) ~4 B
■ High Definition (HD) resolution for Video Output Port- o5 T- N3 S: T* Y; @ Y
(VOP):$ D" a2 w* F( Q. T5 I, E* Y+ E
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)$ m' S1 f) z9 n4 H5 y3 T3 w
(74.25 MHz)1 s5 e2 X7 u9 \6 U( L* D
— Up to 1280x720 at 60 Hz progressive (720p HD)
' X" \7 d$ ? s( D2 \(74.25 MHz)
0 F% s# M; L" B$ t% ?% u■ Supports down to 7.652 MHz Dot Clock (320x240: A g: X3 R q3 e# u/ h
QVGA)
. B& h! a; n- [. v* R■ Hardware VGA l W4 n2 h8 F% h
■ Hardware supported 48x64 32-bit cursor with alpha* K- _! D \) D
blending% _' d; i0 ?# S2 N7 @: p H
Video Processor6 ~0 D! ^( w6 H
■ Supports video scaling, mixing and VOP# {1 ~( f$ `- w5 G8 x
■ Hardware video up/down scalar" [- j2 [& [: o' `8 f( d
■ Graphics/video alpha blending and color key muxing: u5 R; x# {* }' c7 c4 }/ p6 V3 ]
■ Digital VOP (SD and HD) or TFT outputs
& |4 B# F+ h( i" i) L■ Legacy RGB mode1 `+ G- Q* F- x5 u q$ e: }! S
■ VOP supports SD and HD 480p, 480i, 720p, and 1080i M- ~% c. J+ I- m7 v* t
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
- [3 f( M! ~7 o1 d7 K% A0 v& k& bcompliant$ L- E4 W$ g* D- [4 ?
Integrated Analog CRT DAC, System Clock PLLs and$ d/ O1 b! ^7 y/ J9 w
Dot Clock PLL
* Q# p; c2 Y1 h3 p■ Integrated Dot Clock PLL with up to 350 MHz clock" Z7 T: L' x" L$ ?4 K* `& g/ l
■ Integrated 3x8-bit DAC with up to 350 MHz sampling! b1 T! v! m8 H# }8 D9 d8 l
■ Integrated x86 core PLL' C) D9 a& \' X1 f. S. V
■ Memory PLL
, C5 L+ y1 }" S7 rGeodeLink™ PCI Bridge
- _8 Z2 m2 O1 H■ PCI 2.2 compliant
, T1 g3 B8 X ~# a! t: W■ 3.3V signaling and 3.3V I/Os% L. D8 s9 D8 u8 j1 `5 |2 m. B. z
■ 33 to 66 MHz operation4 t' ^4 B S* S4 x+ ? `' p
■ 32-bit interface; T) l/ ?- H4 P" |7 T, Y* f
■ Supports virtual PCI headers for GeodeLink devices
" s; a8 e4 X! n/ u' ]5 ~9 zVideo Input Port (VIP)4 o6 D; [+ I. P& p
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit
2 x2 E# F. Q( [ o. l■ Video Blanking Interval (VBI) support" _- L, u0 \; A+ r: \' A7 I
■ 8 or 16-bit 80 MHz SD or HD capable
7 I% N% @* J" L# m$ W0 q+ ISecurity Block+ ^5 W6 v" K* Z9 ]% h; [
■ Serial EEPROM interface for 2K bit unique ID and AES
) l; X8 r2 A. Q( c(Advanced Encryption Standard) hidden key storage
/ O# \$ Z, |! x+ _$ ^' T(EEPROM optional inside package)
7 A: O+ `7 J1 E+ R% s3 `- g8 Y+ d■ Electronic Code Book (ECB) or Cipher Block Chaining; U2 }' c8 U7 ~$ ]. A" V
(CBC)128-bit AES hardware support/ }( S: q9 N3 |: t2 E, S6 D
■ True random number generator (TRNG) |
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