上个比较浅显on－chip ESD Design

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ESD专家 Albert Wang的Slides
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# U' j% {+ Y/ r6 kON-CHIP ESD PROTECTION DESIGN
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Professor Albert Wang
Dept. of Electrical & Computer Engineering
% U- |* X% u! O9 ]  Z7 ZIllinois Institute of Technology

OUTLINE
" [' F6 T) G: V7 T• On-Chip ESD Protection: Basics & Solutions
• Mixed-Mode ESD Simulation-Design
• Practical ESD Design Examples
• New Challenges: RF/M-S/Whole-Chip ESD
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On-Chip ESD Protection for Integrated Circuits
An IC Design Perspective
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Albert Z.H. Wang
  M7 B: k% R1 r0 Z$ S* aIllinois Institute of Technology, Chicago, USA

Dedication.
Acknowledgements.
. n$ U( ~2 R; \2 fPreface.
1. Introduction. 2. ESD Test Models. 3. ESD Pr
Device Solutions. 4. ESD Protection Circuit Solutions. 5. Advanced ESD Protection; Mixe
and Whole-Chip ESD Protection. 6. ESD Failure Analysis and Modeling. 7. Layout and Te
Influences on ESD Protection Circuit Design. 8. ESD Simulation-Design Methodologies. 9
Circuit Interactions. 10. Conclusion Remarks and Future Work.
Appendix A: Summary fo
Standards. References.
# A! [5 }% L* ^9 _/ n- HAppendix B: Commercial ESD Testing Systems.
Appendix C: E
Protection Circuit Design Checklist. Index.