' k% D2 [# \0 ]" t) L; BInvestigation on Robustness of CMOS Devices Against Cable Discharge Event (CDE) Under Different Layout Parameters in a Deep-Submicrometer CMOS Technology 5 Y4 _# W( V% Q/ y9 W2 F+ x 5 A6 J( p6 i& b0 w
Abstract—Cable discharge events (CDEs) have been found! O) _$ s" x9 ]9 i
to be the major root cause of inducing hardware damage on 0 ]# K# p. L2 M/ B5 | W% C( b6 K Ethernet ICs of communication interfaces in real applications. Still, ' }( S4 F- ^" B8 d4 Q( Z there is no device-level evaluation method to investigate the ro; {2 N3 V6 \ v, e+ {3 H
bustness of complementary metal–oxide–semiconductor (CMOS) 6 V8 d/ T1 O* B devices against a CDE for a layout optimization in silicon chips.