CMOS Transistor Layout

semico_ljj

CMOS Transistor Layout
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Copyright © 2005
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: S, E) n5 G- k0 |0 ?. ^, zTable of Contents

Preface
1. Introduction .................................................................. 1
& `" d  V# _: j( f; R2. MOS Transistors ........................................................... 2
3. Fabrication of MOS Transistor ..................................... 5
2 m; _  ^  B. m1 V5 s0 X( ?! j4. Layout a Single Transistor .......................................... 11
5 u8 l3 @8 `" ]# D4 ]0 X5 n. cFirst Stroke The basic transistor layout ..................... 12
Second Stroke Compact the transistor layout ................ 13
/ i. y. Z4 G2 `* BThird Stroke Speed up the transistor ........................... 17
% |& x, E4 D( _$ J) l3 ^6 xFourth Stroke Clean up the substrate Disturbances ...... 20
Fifth Stroke Balancing area, speed and noise ............ 26
0 j8 ~3 s- w8 l# F2 O& o, J) mSixth Stroke Relief the stress ...................................... 29
Seventh Stroke Protect the gate ...................................... 30
Eighth Stroke Improve yield ..........................................32
5. Layout Several Transistors ......................................... 34
Eighth Stroke Improve yield...........................................35
Re-visit
* o. f8 A) Z. _, l3 ?7 U6 xNinth Stroke Close proximity .......................................36
4 R0 \; s; p% h0 a% V) U8 V7 }( ~Tenth Stroke Interdigitated layout ............................... 36
  g! L1 F6 ^# DEleventh Stroke Dummy transistor ................................... 41
Twelfth Stroke Two-dimension interdigitated layout ..... 43
Thirteenth Stroke Guard ring for the matched transistors ... 45
Fourteenth Stroke Keep NMOS away from N-well ............ 45
5 X1 @' a- h- |$ @1 G% CFifteenth Stroke Orientate the transistor ........................... 46
* ]3 Y/ @3 X" h/ Y) _7 k. p, ZSixteenth Stroke Match the interconnects ......................... 47
Seventeenth Stroke The unmatchable .................................... 50
. y/ ]2 u. F: C; u8 v6. Verifying the Transistor Layout ................................. 52

[ 本帖最後由 semico_ljj 於 2008-11-1 04:01 PM 編輯 ]

semico_ljj

这本书的下半部没有找到，不知哪位有的话可以共享！谢谢！

semico_ljj

Preface
Many IC design books emphasize on circuit design theories and there is
little coverage on custom circuit layout techniques. Hence this book is
, O) U7 `, o. Q( b6 Mspecially written to focus on the custom circuit layout techniques. It is
) X2 f& E/ {0 K8 ?an easy book for the custom layout engineer as prior knowledge on
$ R1 X6 t  j, \' s+ A5 ^, t! Hcircuit design is not necessarily required to understand the content of the
book.
This book is written for two groups of audiences – New & Experienced
custom layout designers. The new comer to custom layout would benefit
from the wider perspectives in implementing the design to a layout. The
experienced custom layout designers, on the other hand, will have a
better appreciation of the rationale behind the layout practices.

semico_ljj

这本书Layout基础知识讲的很不错的，可以好好研读一番！