CMOS Transistor Layout

semico_ljj

CMOS Transistor Layout
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% S# A0 q- J+ Z# F* v3 OCopyright © 2005


Table of Contents
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' [5 X5 {$ @8 ?( Y% x, r+ _Preface
1. Introduction .................................................................. 1
1 _- s( A5 D5 f9 q2. MOS Transistors ........................................................... 2
* L9 H: ]0 w0 I# t0 e4 p3. Fabrication of MOS Transistor ..................................... 5
5 S7 n' W. g/ h, m% H4. Layout a Single Transistor .......................................... 11
7 c* s2 R! H8 m. D9 i+ H; cFirst Stroke The basic transistor layout ..................... 12
' q2 u) _7 J( v: I0 B3 ]Second Stroke Compact the transistor layout ................ 13
Third Stroke Speed up the transistor ........................... 17
- Q( ]+ a: ^7 a/ Y6 J+ [6 H$ FFourth Stroke Clean up the substrate Disturbances ...... 20
Fifth Stroke Balancing area, speed and noise ............ 26
+ ~( [8 }9 f" KSixth Stroke Relief the stress ...................................... 29
Seventh Stroke Protect the gate ...................................... 30
+ F$ q' i6 b% ]3 U1 [, p2 s  uEighth Stroke Improve yield ..........................................32
5. Layout Several Transistors ......................................... 34
& {9 b* S( z( E1 P2 w7 ~: P( qEighth Stroke Improve yield...........................................35
$ u1 [# z' n3 Y& rRe-visit
Ninth Stroke Close proximity .......................................36
/ p" p. \& A9 k" jTenth Stroke Interdigitated layout ............................... 36
Eleventh Stroke Dummy transistor ................................... 41
Twelfth Stroke Two-dimension interdigitated layout ..... 43
Thirteenth Stroke Guard ring for the matched transistors ... 45
' q$ z* }7 M' \: A4 n* HFourteenth Stroke Keep NMOS away from N-well ............ 45
* Q5 \) M! h; h& M3 h" s# v6 t5 IFifteenth Stroke Orientate the transistor ........................... 46
2 r8 |2 j% I  _0 r5 D1 R+ aSixteenth Stroke Match the interconnects ......................... 47
Seventeenth Stroke The unmatchable .................................... 50
2 K$ e2 s! M( {8 m0 g6. Verifying the Transistor Layout ................................. 52
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[ 本帖最後由 semico_ljj 於 2008-11-1 04:01 PM 編輯 ]

semico_ljj

这本书的下半部没有找到，不知哪位有的话可以共享！谢谢！

semico_ljj

Preface
, g/ g5 f1 d9 o) k  o" JMany IC design books emphasize on circuit design theories and there is
little coverage on custom circuit layout techniques. Hence this book is
  K$ @% E4 a' a- i* `+ especially written to focus on the custom circuit layout techniques. It is
& f* m) y4 b2 C+ f+ U0 \% ran easy book for the custom layout engineer as prior knowledge on
circuit design is not necessarily required to understand the content of the
. x  A1 N, r1 ]( V, vbook.
; Z( F. \  i: }4 LThis book is written for two groups of audiences – New & Experienced
custom layout designers. The new comer to custom layout would benefit
from the wider perspectives in implementing the design to a layout. The
experienced custom layout designers, on the other hand, will have a
5 {. H: t7 m! t  J& r' Jbetter appreciation of the rationale behind the layout practices.

semico_ljj

这本书Layout基础知识讲的很不错的，可以好好研读一番！

meis

請問一下 " CMOS_Transistor_Layout_KungFu.part2.rar "   為什麼 ? 這個檔 無法下載ㄋ

meis

請問一下 " CMOS_Transistor_Layout_KungFu.part2.rar "   為什麼 ? 這個檔 無法下載ㄋ

+ P+ u+ e) |. t- Y) R/ n下載解開 為 0K  可否告知在那兒還可知 part2 data ,  謝謝 !!

meis

我已下載  " CMOS_Transistor_Layout_KungFu.part2.rar "  但是 解壓縮 候   0k  沒有內容  , 請作者補上內容  ,   感恩  !!

ychchip

Sound good although the material is not whole part.  It is helpful in beginer of ic layout.
4 `6 U$ j* c( C( i# S2 DI appreciate that the author and the poster contribute the material .....