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這應該是APR的論文
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Abstract:( p+ v. g/ q0 F
Parasitic interconnect corner methods are known to
$ t; L5 W" m# M5 H1 Sbe inaccurate. This paper explains the sources of their errors and! P' l2 I. r7 ?: C1 t* d) D% G
shows that errors in excess of 22% can occur in the predicted1 c2 @8 r0 W% {
corner delays of a multi-layer stage in the presence of process
" F' F2 f. [" {variations. It is shown that exhaustive corner search methods are
2 O7 @0 h, J' y/ m N* F3 G; Winfeasible in practice as they have an exponential complexity in! }8 u. Y! B1 t2 B
terms of required SPICE simulations with respect to the number
4 \6 }0 @, |7 C5 zof layers a stage is routed through. This exponential complexity4 I% \: ~4 p4 h
is reduced to a linear one with a new simulation-based search6 n# W' D; O) z" e3 L5 q- f
method with the aid of stage delay properties. The ideas behind! ?% W& p* ^; @2 L5 O
the simulation-based methodology are shown to be expandable- [( Y# G2 c. z" L+ Z+ ~/ L2 p
to an analytical-based multi-layer performance corner location7 I1 _0 w( U5 A/ K7 s
methodology. The simulated best/worst case delays based on these
% c# H( x. U; j2 Ranalytical corners produce errors below 4% as compared to the
( H$ b' d0 S: ]/ ?& h( P5 v! Y; k6 C! Zexhaustive search simulation based method.
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[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ] |
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