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For ESD test (HBM)
/ k; u; S/ E8 J* Q5 QThe following are the test combination:
& f& F3 ~9 n' p5 m9 ]1. Power to Power- p0 \6 O+ N& o: D3 F
2. Power to Ground
; a& c5 R2 c6 a( k H' c, p4 {/ K3. IO to Power3 p5 n/ ?0 j- c! E
4. Io to Ground2 @+ }& U: G- w- k5 v9 a3 ~
5. IO to IO
4 G1 K, }9 s5 r0 c( E% U(different power domain need to be treated as different power. For ground usually you can treat as one group_silicon use substrate as common ground. But if you measure two different ground pin/ball > 2ohms. It should be seperated as 2 grond.)+ M7 h. H% s0 n3 I/ H. ?
# J u1 v0 ?1 i' Z7 N2 w# }the total zap time fomula will be~ 2(+/- polarity) X (IO#X(P#+G#)+IO#+P#X(P#-1)X(P#-2)X...X1+P#XG)
7 {2 B) q5 n& N IFor example: You have IO1/IO2/IO3/P1/P2/G1
4 |, h& a) }# y3 p: r- B1 X2x((3X(2+1)+3+2X1+2X1)=25(multiple the zap interval)& P6 x1 v g8 v" q; {$ y- d
So for high pin count it will take a lot of time. But it won't take more than a week(for one chip).
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For your reference. |
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