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目前在模擬電路的時候,hspice顯示出/ z3 ?, v8 \- ~+ s4 u5 Y ?# v( l
**error** number of iteration exceeds min(7000, 20*itl1)= 7000 in pseudo
( B) E8 Z* M2 o8 S5 g5 _% m tran process (converge=1 process). Usually this happens when the
7 v: V/ l$ v8 }8 Z0 v* t models are discontinous, or there are uninitialized bi-stable cells
' f% {+ W( u B! i (flip-flop) in the circuit. By setting options dcon=-1 and converge=-1
e: w" C- s8 k& i. d3 \ you can disable auto convergence process. Retry the run, non-convergence: z2 u" z& Q, c% G5 v9 C4 j
diagnostics will provide useful information about the nodes and devices4 v. J% T( `+ ^/ j2 m" ]
which can be used to work around the non-convergence problems.6 D- D. W1 j; B6 F% o4 Y% n
* Q U b# x, t. i2 ^0 O! Z# Z**error**: no convergence in operating point: k7 w# x8 i" @3 l2 X. H0 u' H
- R7 t d, g3 V' F
而我的設定為' S/ ]/ e$ }) }) Q; x# R, ?
.option post itl1=400 itl4=35 dvdt=3 lvltim=1 CONVERGE=1 reli=0.005; ?5 M: }, i. g
+absi=1pa reltol=0.1 abstol=10Ma vntol=10Mv gshunt=1E-7
$ F% G% v* r. b2 l$ y. c% |請問各位高手,我要改哪裡才可以讓它可以正常模擬,或是可以幫我解釋一下造成這個的原因,' ]9 o6 \* [6 a W0 ]5 e% I$ E0 \
不好意思,因為搞了好幾天了還跑不出來,只好上來尋求解答.
* |8 H5 n( X. V5 {- q 謝謝 |
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