關於cell-based 流程的DRC問題

ywchywch

請問各位大大
* G. O( L  K, V% Z我用TSMC18的design kit作cell-based layout的練習，軟體是用encounter，大部分的步驟是依照CIC所提供的Lab去做，完成之後用我的GDS檔去做DRC，會出現下列的DRC ERROR，而且是M1~M5、via1~via5都會有這方面的error，因為error的數目頗大，不太可能用人工去debug，所以我想請問有經驗的大大們，能不能告訴我最大的問題點在哪裡？以及這些錯誤代表什麼？要如何debug比較適合？

先謝謝各位大大了!!感激不盡!!

) g  p( x7 s: D9 S) I+ s$ A1. M2.W.1 { @ M2 width < 0.28
  INT M2 < 0.28 SINGULAR REGION ABUT < 90
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' e& {: h4 `2 ?0 h- N2. M2.S.1 { @ M2 spacing < 0.28
  t9 [0 f4 \# G/ _0 I8 M* y5 R  EXT M2 < 0.28 ABUT < 90 SINGULAR REGION
; T% V, C& k, t( A, _7 Q}
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3. M2.S.2 { @ Wide M2 (>10um) min. to M2 < 0.6 um
) D) k7 w, }2 ~7 `  M2_S5 = SHRINK (SHRINK (SHRINK (SHRINK M2 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
  M2_G5 = GROW (GROW (GROW (GROW M2_S5 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
/ l1 F+ Z' S* n1 ~+ K/ A) r$ {) E  M2_Wide = M2_G5 AND M2
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3 u( v* ^5 L( x% _0 e  M2_Exp = SIZE M2_Wide BY 1 INSIDE OF M2 STEP 0.196
  M2_Branch = M2_Exp NOT M2_Wide
  M2_Branch_edge = M2_Branch COIN INSIDE EDGE M2
2 [6 p! _0 u0 d1 L  M2_Check = M2 AND (SIZE M2_Exp BY 0.6)
  M2_Else = M2_Check NOT INTERACT M2_Exp
  M2_Extend = M2_Check NOT M2_Exp

  EXT M2_Wide M2_Else < 0.6 ABUT >0 <89.5 REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 OPPOSITE REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 CORNER REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 PROJ==0 REGION
  A = EXT M2_Exp < 0.6 ABUT > 0 < 89.5 SPACE REGION
. Y; C: I( A8 V  ^  A NOT INTERACT M2_Extend
}
4. M2.E.1 { @ Min extension of a M2 region beyond a VIA1 region is 0.01 um
7 Z$ I1 ^9 u+ X  n0 M   ENC VIA1 M2 < 0.01 ABUT<90 SINGULAR
$ y3 E( O. H; E6 x   VIA1 NOT M2   
  L- @: s% W. |; D8 D}

& Q3 N: t- b; f- |# a6 I2 ]9 O5. M2.E.2 { @ Min extension of M2 end-of-line region beyond VIA1 region is 0.06um
* u* L" N/ B+ j& g* `3 L& i/ Q   X = ENC [VIA1] M2 < 0.06 ABUT < 90 OPPOSITE                // a narrow side
   INT X < 0.26 ABUT == 90 INTERSECTING ONLY       // adjacent narrow sides
}
0 p4 h4 c# A% }1 ~+ J$ i
6. M2.A.1{ @ Min M2 area region < 0.202
% c' Z: p0 E# \! N  w) X1 U* H  AREA M2 < 0.202
6 @, y( Y7 e  n}
0 {' `+ x1 b1 U1 `. v7 {// Density check M2.R.1 included at the end of this file
* c: e) u1 P' O/ a0 Y% [// VIA2 checks
//=============
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' u# r4 n. i) I0 P5 j+ t. o7. VIA2.W.1 { @ VIA2 must be 0.26 x 0.26 um
  }) G0 ^9 I$ [. N  A = NOT RECTANGLE VIA2 == 0.26 BY == 0.26 ORTHOGONAL ONLY
  A OUTSIDE RNGX   // exclude from metal fuse protection ring area
}
( c0 m+ \6 G2 c0 O- ^' c
) f9 y% M8 d1 R: z2 x, n/ a+ _8. VIA2.S.1 { @ VIA2 SPACING < 0.26
  EXT VIA2 < 0.26 ABUT < 90 SINGULAR REGION
}
2 ?" Z" a7 B* q. k: k4 A9 Z; T
- z/ G3 C2 w, d8 l9. VIA2.E.1 { @ Min extension of a M2 region beyond a VIA2 region is 0.01 um
: `! C' S, ?( N# U$ U  m  ENC VIA2 M2 < 0.01 ABUT<90 SINGULAR
  VIA2 NOT M2   
}
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10. VIA2.E.2 { @ Min extension of M2 end-of-line region beyond VIA2 region is 0.06 um
   X = ENC [VIA2] M2 < 0.06 ABUT < 90 OPPOSITE         // a narrow side
   INT X < 0.26  ABUT == 90 INTERSECTING ONLY     // adjacent narrow sides
}

motofatfat

我猜你試用APR軟體RUN出來ㄉ
* h: r7 d* Y1 f應該是相同NET ㄉMetal space 和 via extension
& M5 Q! c/ [1 `, A不夠的問題,通常會用 skill file 來修正

michael6172

我覺得你打電話去CIC問工程師會比較快吧 ...