關於cell-based 流程的DRC問題

ywchywch

請問各位大大
我用TSMC18的design kit作cell-based layout的練習，軟體是用encounter，大部分的步驟是依照CIC所提供的Lab去做，完成之後用我的GDS檔去做DRC，會出現下列的DRC ERROR，而且是M1~M5、via1~via5都會有這方面的error，因為error的數目頗大，不太可能用人工去debug，所以我想請問有經驗的大大們，能不能告訴我最大的問題點在哪裡？以及這些錯誤代表什麼？要如何debug比較適合？

先謝謝各位大大了!!感激不盡!!
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1. M2.W.1 { @ M2 width < 0.28
  INT M2 < 0.28 SINGULAR REGION ABUT < 90
) e8 A+ T" y3 ^! y. b6 V8 v}
+ |# S2 o! H- y" [! X
2. M2.S.1 { @ M2 spacing < 0.28
  EXT M2 < 0.28 ABUT < 90 SINGULAR REGION
1 G5 }: S; i0 B7 _+ r0 E}

3. M2.S.2 { @ Wide M2 (>10um) min. to M2 < 0.6 um
" j5 Q! Y  E/ D1 I9 t5 L: @, S  M2_S5 = SHRINK (SHRINK (SHRINK (SHRINK M2 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
  M2_G5 = GROW (GROW (GROW (GROW M2_S5 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
" o: K" P% y' W+ a' e8 H  M2_Wide = M2_G5 AND M2

  M2_Exp = SIZE M2_Wide BY 1 INSIDE OF M2 STEP 0.196
! O. G1 S4 Q. ^- S  M2_Branch = M2_Exp NOT M2_Wide
  M2_Branch_edge = M2_Branch COIN INSIDE EDGE M2
, A( D6 y5 A1 N/ o! T% r  M2_Check = M2 AND (SIZE M2_Exp BY 0.6)
. A5 m4 x0 }! U* n! z  M2_Else = M2_Check NOT INTERACT M2_Exp
2 R) D( r, z* c2 t2 Q  M2_Extend = M2_Check NOT M2_Exp

  EXT M2_Wide M2_Else < 0.6 ABUT >0 <89.5 REGION
! O  s+ G: t' P0 m  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 OPPOSITE REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 CORNER REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 PROJ==0 REGION
7 s5 I% n1 I% i. ]# b  A = EXT M2_Exp < 0.6 ABUT > 0 < 89.5 SPACE REGION
3 S  _5 w# F; y$ M" V+ l" j  A NOT INTERACT M2_Extend
* G1 ]* f" F( |. y8 @9 L& ]}
4. M2.E.1 { @ Min extension of a M2 region beyond a VIA1 region is 0.01 um
0 M$ n$ `) f# B+ }4 Y' h0 R   ENC VIA1 M2 < 0.01 ABUT<90 SINGULAR
   VIA1 NOT M2   
! N9 k3 q" h, L: ~  u# [5 w* I  ?}

5. M2.E.2 { @ Min extension of M2 end-of-line region beyond VIA1 region is 0.06um
   X = ENC [VIA1] M2 < 0.06 ABUT < 90 OPPOSITE                // a narrow side
   INT X < 0.26 ABUT == 90 INTERSECTING ONLY       // adjacent narrow sides
}

6. M2.A.1{ @ Min M2 area region < 0.202
) ^! P: o. y9 c$ q5 ~  AREA M2 < 0.202
}
// Density check M2.R.1 included at the end of this file
// VIA2 checks
//=============
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7. VIA2.W.1 { @ VIA2 must be 0.26 x 0.26 um
  A = NOT RECTANGLE VIA2 == 0.26 BY == 0.26 ORTHOGONAL ONLY
  A OUTSIDE RNGX   // exclude from metal fuse protection ring area
+ W' u; {+ @( k* _  K}

' G+ c0 ]0 j8 a8. VIA2.S.1 { @ VIA2 SPACING < 0.26
  EXT VIA2 < 0.26 ABUT < 90 SINGULAR REGION
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1 K+ U! S5 {5 T# @$ n4 }9. VIA2.E.1 { @ Min extension of a M2 region beyond a VIA2 region is 0.01 um
  ENC VIA2 M2 < 0.01 ABUT<90 SINGULAR
  VIA2 NOT M2   
}
+ k% h0 \+ l9 h. }3 J' [
10. VIA2.E.2 { @ Min extension of M2 end-of-line region beyond VIA2 region is 0.06 um
' e& }3 m- r* B9 K2 h, E1 y7 h   X = ENC [VIA2] M2 < 0.06 ABUT < 90 OPPOSITE         // a narrow side
   INT X < 0.26  ABUT == 90 INTERSECTING ONLY     // adjacent narrow sides
}

motofatfat

我猜你試用APR軟體RUN出來ㄉ
; s& i. `* L3 @% ~$ y應該是相同NET ㄉMetal space 和 via extension
  R3 ?! ~! V! [' e不夠的問題,通常會用 skill file 來修正

michael6172

我覺得你打電話去CIC問工程師會比較快吧 ...