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Senior Digital Design Engineer$ a" j4 V3 M$ b( L: Q! z2 R
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公 司:A famous European IC company
0 b; A, ?8 ]/ d3 U3 g- U, H9 j3 y工作地点:上海
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Job description
( I& H7 @$ ]! [7 ?& A/ {- define system partitioning of s/c circuits and system 8 I$ {% f! |2 U8 c# m/ M6 f, L+ C
- define HW/SW co-partitioning
4 C. Y% ^4 g: W& e9 {& v5 m- provide technical feasibilities based on system simulation and/or FPGA based demonstrator % E/ i% N+ Y/ ~2 N
- propose new technical solutions on s/c and system level
! q: I/ v! { ^- design digital part of mixed signal (smart power) ASICs ( y* L# b0 T+ l
- close cooperation and interaction with international teams J- p W# U* G, e _: d% N
- coach junior engineers 0 E5 b7 J6 G3 g+ b( d- w
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Required knowledge competencies and attributes $ {1 f+ e% g: V, Q* M4 y9 a
- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent)
$ e2 ]# i$ J, }2 `; t- > 5ys experience in digital design
5 q0 k* A! c- {) p8 N; r- good understanding of ASIC mixed signal flow (Cadence based) 9 n- s6 ^5 c9 L' `. G9 @, o
- strong background in HDL coding, verification and toplevel integration # k- F# c0 N+ w. ]; ^5 l/ R
- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)
* ]: m8 O1 r; e# l# C- experience in FPGA development
- d, ?% |3 g2 P, w- G4 D- very good communication skills (written, oral)
. K! J1 d5 Z, B& w* @1 [1 U; S- self motivated and high level of flexibility
+ ~ V* n+ \1 o- foreign languages: English, German (not a must) |
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