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Senior Digital Design Engineer, ]9 b4 U ?9 v
: i6 ~: z" u, N' ^公 司:A famous European IC company1 I$ |6 `0 |/ N, j4 f7 W6 i& L
工作地点:上海
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9 e5 x8 M; @; b% W$ u3 Y: f; J; \Job description
0 D/ Y4 t" [$ L' e w$ m- define system partitioning of s/c circuits and system $ L1 o. w9 L h7 `- @& u% f1 b& p
- define HW/SW co-partitioning c s o8 t2 A8 D# q, Y
- provide technical feasibilities based on system simulation and/or FPGA based demonstrator
, ?: g# ]1 w) f( C: d1 E5 H% Q- propose new technical solutions on s/c and system level
* g- ]0 b& t3 Q# H7 Q: w& W- design digital part of mixed signal (smart power) ASICs 8 j4 H9 b7 D1 P# I& M
- close cooperation and interaction with international teams
) S$ c/ G8 t# y4 m! `& D! H2 M- coach junior engineers
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Required knowledge competencies and attributes }6 t0 U( A" V
- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent) - R4 {- b `# O" K- [( w( a7 x# L
- > 5ys experience in digital design 5 i6 }0 E" ?" X$ I
- good understanding of ASIC mixed signal flow (Cadence based)
7 J7 }8 S1 W7 B$ ~# g- strong background in HDL coding, verification and toplevel integration
% A. a. E/ y6 J- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)
2 g) p3 |9 b | ~3 [1 B9 o- experience in FPGA development 3 X' q9 e8 Q/ ]0 z
- very good communication skills (written, oral)
; B. e; b) Z$ g; S& Z: O! ]9 d7 f0 k, W- self motivated and high level of flexibility - z/ D7 _% i4 n- r7 h1 [ i# b
- foreign languages: English, German (not a must) |
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