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Senior Digital Design Engineer9 t' j7 ` M3 A. @
: q! y; ^7 U2 k: ]9 M公 司:A famous European IC company6 d6 ] H& `5 f/ M& t
工作地点:上海5 k! M A/ a: m( S) V" S
! R6 O! F$ l" L' W- r- xJob description 3 S( r, F# n1 Q" ^
- define system partitioning of s/c circuits and system
/ [ E8 _8 ?& L- define HW/SW co-partitioning 6 T( R! j& P" ?2 i, S! \# L6 Q
- provide technical feasibilities based on system simulation and/or FPGA based demonstrator
' z" W `# ]* V% J- propose new technical solutions on s/c and system level 4 l5 c6 ?, A8 o: y, U/ U
- design digital part of mixed signal (smart power) ASICs " M0 X! d3 r# |: Q
- close cooperation and interaction with international teams + E g( w8 ~1 |+ M3 M
- coach junior engineers
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% @: N) U* |( J+ vRequired knowledge competencies and attributes 0 x! x* C: Q0 x6 V
- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent)
3 H/ D5 t3 ]) M- r% c- > 5ys experience in digital design
+ X0 z' `4 M# \1 V+ D, m7 O/ j- good understanding of ASIC mixed signal flow (Cadence based)
2 v& e, s+ G! ?- B n. D9 [- strong background in HDL coding, verification and toplevel integration , e' j6 z ]/ r1 T# u* A5 Y0 C0 R
- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)
; R. v; Z/ h. i- experience in FPGA development 3 H( q- K$ W4 H0 o$ X+ x" x
- very good communication skills (written, oral)
" v: k% A4 b/ o1 Q m- self motivated and high level of flexibility X) n& S3 e9 J$ R# o, Y+ I6 ~: D
- foreign languages: English, German (not a must) |
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