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Senior Physical Design Engineer- r# R" X, _2 S
公 司:A famous IC company/ T- K( D5 e9 W/ y
工作地点:南京
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! _1 u" |$ x t+ K$ J4 r2 gKey Responsibilities
V1 m+ J0 A/ w. g' U5 D5 {/ SDepending on experience, key responsibilities will involve some of the following: ; V" i+ Z, G( p- [( q; j7 X
IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification. 8 Y5 c7 M. ]0 E
As a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
0 p8 `+ d# w% ?4 QLeading a team of physical design engineers and resolving the technical related issues.
$ ~ T+ i4 n! TCrosstalk analysis, power analysis, and static timing analysis.
# h' Z# h* H. E9 o/ N& \Write scripts in Tcl to improve productivity. 4 ^9 F2 o" x$ d: }4 X$ E
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Experience: 5+ years in physical implementation engineering
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Essential skills
( y( n8 l- N6 Q! F- |( _MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills + Q% c3 L% m7 N% Y; |/ R, ^
Experience with Magma or Synopsys place-and-route tool set and physical design project implementation. ( t8 {+ v3 t6 {" b) d$ v- C
Good programming skill. Capable of writing Tcl or Perl.
, f2 a! ~+ y$ m( a6 m* j" [- DFamiliar with synthesis, static timing analysis.
- `+ A* [6 N! v% [$ ySelf-motivated team worker, good verbal and written communication skills in English. 3 N% x% C% h' T, \( |+ y
Technical and team leadership proffered. Previous management experience highly desired. 7 d7 }( d5 q$ A% g% F2 N5 w
Experience with synthesis, DFT, and verification is preferred. |
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