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Senior Physical Design Engineer
# c( B/ U+ l& ^ b# R公 司:A famous IC company
w& ]: w Y( z& C5 e工作地点:南京
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% X8 v# _5 a4 x0 {' DKey Responsibilities
$ v. ]' @% m$ Y5 mDepending on experience, key responsibilities will involve some of the following:
7 F/ F2 r9 l6 o6 h* WIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
8 _/ X. F. O3 K" H& H6 q6 BAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
* G3 u! p$ { V; }Leading a team of physical design engineers and resolving the technical related issues. . b- u @, K' n# {
Crosstalk analysis, power analysis, and static timing analysis.
) v: o! R5 {/ R4 w" ^ YWrite scripts in Tcl to improve productivity.
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Experience: 5+ years in physical implementation engineering
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& ?9 w, ]- M, q8 Y. Q. n8 fEssential skills ( N1 |" x! G+ u3 e4 m, E
MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
+ N( Y+ x8 c1 H& p& y& tExperience with Magma or Synopsys place-and-route tool set and physical design project implementation. 2 w% r Y3 |: M! ] {1 l& i
Good programming skill. Capable of writing Tcl or Perl.
+ ]9 A* T1 k( Q8 X4 s7 U4 z" `Familiar with synthesis, static timing analysis. ; } g6 }! Q& o3 F+ j
Self-motivated team worker, good verbal and written communication skills in English.
7 F; I/ A/ E: w6 ATechnical and team leadership proffered. Previous management experience highly desired. ( m& X ^ D! H7 d; O- c3 G7 p
Experience with synthesis, DFT, and verification is preferred. |
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