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【工作內容】
7 M ]4 k& k8 n" |8 Z- m先進製程與模組開發 (DRAM/ Flash/ Logic)
; b) {; M& M, \# F* ^7 H- Photolithography (e-beam, EUV, OPC/RET, Photo Resist Materials),
9 L8 V, l- [( M Dry Etch, Cleaning & CMP, Diffusion, Ion Implantation, Metallization,8 B% o$ ^- z) {6 d
Metrology & Inspection, etc.: D, Y! @2 M6 K+ s2 o! @; o, o2 w7 X
- Device Isolation, Transistor, Capacitor, Dielectric6 Q- N6 z/ W# e& }7 \
- High-K/Metal Gate, SiO2/SiON Gate Dielectric) n0 f- E* G% @, N" V" w* K8 M
- Low-K, Interconnect, etc.# F6 ]$ K/ C7 f% w
※ OPC: Optical Proximity Correction (Comput. Litho)
, q v) h2 @4 Q6 Y8 L MPC: Mask Process Correction' k5 A5 H# q* {# v# x
( |% }) {1 }4 `FEOL/BEOL 製程整合 (DRAM/ Flash/ Logic)8 v; m0 R2 d% E5 B& R
新型記憶體: PRAM, STT-MRAM, ReRAM
) `# }$ D1 K2 i6 N) kTCAD/ECAD
1 G1 B6 v3 U0 E% U- Process & Device/Material Modeling, Circuit Compact/Reliability Modeling( Y% H5 s1 H( p: u3 Y- v0 Y
- Circuit Simulator Development
: m. s( _, |! J# g# U7 b- System-Level Modeling/Simulation, Virtual Platform, HW/SW Co-Design
; e& \. c) O" {; q- Simics/CoWare/SOC Designer UserMemory Controller/Memory Architecture/
" s* Z$ {: W9 F; Z- z SSD Research Experience |
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