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【工作內容】1 y4 d6 j5 |# c7 c
先進製程與模組開發 (DRAM/ Flash/ Logic)# e* ~. y) i9 H6 b
- Photolithography (e-beam, EUV, OPC/RET, Photo Resist Materials),' s$ _3 M, J& F5 a8 r" x
Dry Etch, Cleaning & CMP, Diffusion, Ion Implantation, Metallization,: `! m: p& A$ m. N+ x, ?- M
Metrology & Inspection, etc.; A* e2 a3 P& \0 ~, i
- Device Isolation, Transistor, Capacitor, Dielectric
2 j, U1 d3 r, S4 }6 J& @; ^- High-K/Metal Gate, SiO2/SiON Gate Dielectric
7 w3 k1 I% M- x& N4 `+ ]- Low-K, Interconnect, etc.
% t* q6 ~% R$ h6 `+ E+ a※ OPC: Optical Proximity Correction (Comput. Litho)
+ B0 D# \$ D+ ?9 z9 L8 s$ A MPC: Mask Process Correction
! U2 }4 v8 |6 t2 ?, C# Y; U8 C: E: J$ A9 h( ?+ u' U/ U' P
FEOL/BEOL 製程整合 (DRAM/ Flash/ Logic)/ V+ ^. j* Q! @* m
新型記憶體: PRAM, STT-MRAM, ReRAM2 t- W3 z4 M" z2 e! H
TCAD/ECAD
9 U" v* T& G1 Z: B5 j# I; z$ ]- Process & Device/Material Modeling, Circuit Compact/Reliability Modeling
% @1 X0 u1 h- g! P- Circuit Simulator Development/ ~0 A, i( d5 I- G, ?" I h L) _0 v
- System-Level Modeling/Simulation, Virtual Platform, HW/SW Co-Design- p+ D' ?, W8 D; t; z( J. b1 I- X
- Simics/CoWare/SOC Designer UserMemory Controller/Memory Architecture/
; b# x# ~! ~% N) w SSD Research Experience |
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