|
實驗平台~
- b% ^* {" A3 ~/ X# B2 E「Terasic」Altera DE0 多媒體開發平台,Cyclone III 3C16 FPGA
2 M! h9 f' J% V. s1 _: [6 s在建構的過程中(僅放入cpu跟memory ip)
" P5 t2 e8 V! \' |+ Hno reset vector has been specified for this CPU
+ d; s) i: J3 I" ?! v% K6 gno exception vector has been specified for this CPU0 _. m- I( [" Y! x: {3 y% `; s9 Y
這兩個訊息,沒辦法完全消除,這兩個一定要消除嗎
& N' D- X' _$ T s8 V* A7 S試過
8 B7 O' u: z5 _; h8 S8 \2 i! W: Son chip memory; i- v! O0 _1 F" u) U
sdram
7 q- f2 M' ^4 f2 X; x4 G" b用上面兩個去試過所有可能的組合(mem/mem,sd/sd,sd/mem,mem/sd)
6 R2 m: U: c0 h8 H/ j! Wno reset vector has been specified for this CPU1 G- w& }7 j7 X5 p2 G1 a, R( `
no exception vector has been specified for this CPU
( D4 K+ [* Y; X總是會有一個沒辦法去除(先選的訊息會被消除)3 Z& b% k. |8 U5 S' {
$ S \. I& e3 w3 T0 G1 y有人有在玩10.1版嗎?請多多幫忙~~
( [1 j) m+ E5 R, o% |9 x/ x2 Q- s0 b: O# h0 }1 g
目前打算~改用10.0sp1跟9.1sp2試試看$ R5 z8 P( Y7 U0 }* i2 A7 q
( B# E8 o* s0 ~# bTHX~ |
|