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實驗平台~
% b9 g5 Q: H/ Y; b& E( ~5 b「Terasic」Altera DE0 多媒體開發平台,Cyclone III 3C16 FPGA
2 b' I3 w+ x9 e1 S在建構的過程中(僅放入cpu跟memory ip)
2 T& M: A( u' e# P* Qno reset vector has been specified for this CPU& Q/ K2 } @, \% u
no exception vector has been specified for this CPU! ^* D' A# j- A' f, x8 \: v
這兩個訊息,沒辦法完全消除,這兩個一定要消除嗎
' j9 ~4 j* ]& }2 b3 N1 Z& L2 H) r試過# p- {- c2 N$ j3 d9 A
on chip memory% z+ Z) E% a! J1 G7 k' E
sdram% {& O/ O& H; T& p
用上面兩個去試過所有可能的組合(mem/mem,sd/sd,sd/mem,mem/sd)7 H+ m# ^, V4 P( v) }1 `. I: d
no reset vector has been specified for this CPU B! B+ ]/ X2 \+ V5 {9 z" p
no exception vector has been specified for this CPU' l( Y4 k8 z b% y( D& h$ E' p
總是會有一個沒辦法去除(先選的訊息會被消除)
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有人有在玩10.1版嗎?請多多幫忙~~
: G0 y! a- c1 o, G7 w9 v3 H4 g% u
+ F) F0 h+ ~( a0 d# d目前打算~改用10.0sp1跟9.1sp2試試看+ e1 s" g, g$ R" Q$ N" E4 {
, f) b5 }& B; c: K! Z7 Z$ o. STHX~ |
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