library compiler建DFF cell的疑問

霜淇淋

各位好，小弟打算跑HSPICE改變一下cell library的資料
6 [! f. l3 z8 e9 s: {但有部分還是不太理解，以下是D-Flip Flop(DFF)接腳D及CLK部分

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* l0 T+ z0 W! z! I5 u# N  pin(D) {
- V9 d: v$ t# ~7 k7 }' n6 |    nextstate_type : data;
    direction : input ;
    capacitance : 0.001165;
    internal_power() {
      when : "!CK";
      power(POWER_7x1) {
        index_1("0.009652,0.016106,0.025992,0.046675,0.088958,0.216628,0.447814");
        values("0.003651,0.003635,0.003626,0.003611,0.003614,0.003725,0.004117");
      }
    }
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0 `+ b( ^& p4 Q& b" gvalues值是指不同的D端電容(index_1)在CLK=0時的POWER值嗎?

    internal_power() {
) p4 y' ^! \; I2 G( e7 Y      when : "CK";
; E+ u% n6 ]* y5 V2 U0 E      power(POWER_7x1) {
        index_1("0.009645,0.016106,0.025991,0.046674,0.088957,0.216628,0.447814");
        values("0.000127,0.000122,0.000120,0.000119,0.000117,0.000116,0.000114");
      }
    }
# N5 ^( e7 d9 z6 R& Z    timing() {
  n8 U) z8 `' A! d      related_pin : "CK";
      sdf_edges   : both_edges;
# p0 |3 \6 I1 V& y      timing_type : setup_rising;
      rise_constraint(CONST_3x3) {
; ]- R$ a" x# n) R0 ?* d- m- G) B9 U        index_1("0.006000,0.217000,0.434000");
7 c" \9 _: Q6 J        index_2("0.006000,0.108000,0.217000");
/ H  s2 m* G5 ^! d( H4 e        values("0.029659,0.026470,0.036963",\
               "0.032032,0.023912,0.031939",\
' {; x' M# R' k; N* E0 F8 C0 S               "0.004917,0.000010,0.004825");
      }
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values是指DATA輸入transition time(index_1)跟CLK輸入transition time(index_2)不同時所得到的setup timing嗎?
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      fall_constraint(CONST_3x3) {
        index_1("0.006000,0.217000,0.434000");
        index_2("0.006000,0.108000,0.217000");
: S. j" ^4 a& P        values("0.074043,0.058526,0.059156",\
               "0.152860,0.139810,0.137970",\
  j" |4 P5 Z1 O$ N               "0.231770,0.216260,0.216890");
      }
2 j; X2 X5 j: g; C: q    }

yytseng

internal_power() {
' `" Q/ A: i7 Q      power(POWER_7x1) {
. f4 P( C2 f7 U# U0 u        index_1("0.009651,0.016105,0.025992,0.046675,0.088957,0.216628,0.447814");
        values("0.004066,0.004029,0.004007,0.004000,0.004050,0.004346,0.005062");
. l# E. r$ u/ Dvalues值是指不同的CLK端電容(index_1)在CLK=0時的POWER值嗎?
===> Wrong !
===> they mean while different input slew (transition) of CK, results different internal power
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min_pulse_width_high : 0.061268;
0 Z( f/ v/ l) m# p8 e  cmin_pulse_width_low  : 0.125320;
CLK Hi/Low的長度?
- Y2 d) r+ D6 L====> No, these mean minimum possible of clock waveform to prevent functional fail, for high (1) and low (0)

& O7 l) I3 b# ?' B4 X( }0 a" ^  T      index_1("0.009652,0.016106,0.025992,0.046675,0.088958,0.216628,0.447814");
9 o3 @8 L& `* {6 @. I5 [        values("0.003651,0.003635,0.003626,0.003611,0.003614,0.003725,0.004117");
, r# n' j' \# {4 x$ d1 W      }
    }
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( l0 A5 n* ^- s$ x' r  Lvalues值是指不同的D端電容(index_1)在CLK=0時的POWER值嗎?
: P5 x7 u8 O7 x! Z3 B* m==> No, index1 is often input transition. here represents input slew of D pin

        index_1("0.006000,0.217000,0.434000");
        index_2("0.006000,0.108000,0.217000");
+ U% ]! E- D5 Y: g! ?) v        values("0.029659,0.026470,0.036963",\
               "0.032032,0.023912,0.031939",\
               "0.004917,0.000010,0.004825");
      }
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+ W& w/ A: X. D" ?" [; _* m+ b4 S) Avalues是指DATA輸入transition time(index_1)跟CLK輸入transition time(index_2)不同時所得到的setup timing嗎?

===> yes, but you have to refer index_2 definition in the front of liberty file to make sure.

霜淇淋

timing() {
( ~) t7 _# m0 g8 D; K: n" Q      related_pin : "CK";
      sdf_edges   : both_edges;
      timing_type : hold_rising;
: ~% j2 L" c2 f/ z; D      rise_constraint(CONST_3x3) {
& ^% Y+ V5 t  d; T6 t$ w$ E        index_1("0.006000,0.217000,0.434000");
# V- ~5 M$ l9 `. p4 n0 F; f        index_2("0.006000,0.108000,0.217000");
        values("-0.005932,-0.005209,-0.015703",\
7 A& ]2 W; E# x# j               "0.013887,0.014610,0.004117",\
8 {  D0 y/ i+ B1 |               "0.060728,0.056519,0.043560");
      }
      fall_constraint(CONST_3x3) {
5 \: b- b4 C# g; L8 J& t! D( H        index_1("0.006000,0.217000,0.434000");
        index_2("0.006000,0.108000,0.217000");
        values("-0.018261,-0.002744,-0.005839",\
               "-0.028829,-0.021521,-0.028745",\
               "-0.004426,0.053203,-0.004342");
      }
    }
/ u! U. V) L" R8 A6 Z  }
  pin(CK) {
    direction : input ;
    capacitance : 0.001915;
9 ^+ C; {, h' x2 n3 l( f    max_transition : 0.217000;
    clock : true;
# A% I, r9 a+ ~) L2 J3 s. v/ \    internal_power() {
      power(POWER_7x1) {
        index_1("0.009651,0.016105,0.025992,0.046675,0.088957,0.216628,0.447814");
        values("0.004066,0.004029,0.004007,0.004000,0.004050,0.004346,0.005062");
& S, H4 h- b+ ~: V# A. h$ z      }
8 ]* N. x7 v9 \) i    }
+ v9 v& O- J' q* D: i( a! O
( L* L4 ^* j0 X
values值是指不同的CLK端電容(index_1)在CLK=0時的POWER值嗎?

    min_pulse_width_high : 0.061268;
    min_pulse_width_low  : 0.125320;

% ]! x2 u2 M4 L6 M, Y5 mCLK Hi/Low的長度?
  }
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有觀念誤解的話希望幫忙修正..謝謝
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[ 本帖最後由 霜淇淋 於 2009-9-17 02:03 AM 編輯 ]