請教90/65奈米,SOC Tape-out一次NRE大約多少

ajack

如題
" Y, A0 w- Q" r8 |
& C. n; R) h3 @6 k2 i* ?請教業界各位先進
目前的chip開發,需要多少投資?
2 ~2 g6 f6 j* G( N: T首先是假設 Febless design house.
2 z: p/ @6 ^$ `- b. A2 I自家由algorithm 到 RTL simulation 完成
% Y4 K. k. H2 Q- m* `: F後端包給 backend service 公司 (layout, mask, Fab, assembly..)
) Z) ?9 b9 v* y& n& V  b! u& I以 ARM9 or ARM11, AMBA2.0 為platform
那麼
  (1)90奈米, NRE大概多少?
, f$ d# Y; v: _& Y" M. G3 z  (2)65奈米, NRE大概多少?
9 m+ j% N$ R2 y# a# i. m  (3)或是您知道其他製程, NRE大約多少...

謝謝

ajack

Well,

I just estimate the investiment of a ASIC team.
0 n) m2 \! d+ Q% Enot servey for a project.
So, I just want to know the range of NRE.

For example, It will be
0 K. p! Y6 |8 y* k  Y5 l4 L# N(1) 5,000,000 NT$ ?
+ p2 P$ S$ F; f9 q, d(2) 8,000,000 NT$ ?
(3)10,000,000 NT$ ?
. ]. C) X9 m4 [: d(4)12,000,000 NT$ ?
(5)15,000,000 NT$ ?

( X1 L; ~1 Z$ N+ ^Sure, I understand following things:
- full set mask cost more
( p* J5 D6 E  k3 a( r" h - PLL/LVDS... analog IP are extra cost
- pin-count and area also influence cost
$ x1 f$ |( o# ?5 N: s7 V& U4 K - different package also cost different

. C# e( R2 N8 Y5 `8 b/ q. nTherefore, if really need information for estimate,
just for example.
Let's assume a SoC for FullHD TV application
it will include
9 j& }# U5 u0 S1 c2 F* J  - ARM AMBA
  - DDR2 I/F
8 A) @. s3 `/ {- d* g  - GPIO, IIC,...
0 u/ @: I$ g* Y/ d  c: h5 v; f. S  - LVDS out (dual link)
9 C; b; a9 a4 S* O  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,
( |; [; ]+ G  w- c  - 12bit ADC, 10bot ADC x2
  - PLL/DLL
& w" [( S/ j9 r  t  ~  - 256 pins 以上
. N6 L" w* K$ j1 G/ J: U
Than,... any idea about NRE fee?
again, I just want to know the range