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[經驗交流] 請教90/65奈米,SOC Tape-out一次NRE大約多少

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1#
發表於 2009-8-13 10:26:46 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
如題2 {1 Y  y8 E; [4 a
" E9 G: _5 K: J3 h. }9 A
請教業界各位先進8 E- e4 D0 z1 B+ ]
目前的chip開發,需要多少投資?
3 A# ^3 R0 l( B7 b% E2 ~7 ]& x首先是假設 Febless design house.2 i' V6 n  S2 t$ A6 z
自家由algorithm 到 RTL simulation 完成1 e0 a4 M7 Q2 Z' M. S7 J
後端包給 backend service 公司 (layout, mask, Fab, assembly..)( R$ \8 v% H! c
以 ARM9 or ARM11, AMBA2.0 為platform
& s( k5 u' Y. h1 P那麼2 U1 R/ W2 B3 h# p9 x
  (1)90奈米, NRE大概多少?
  h! V; w- G- X. k) y  (2)65奈米, NRE大概多少?& k9 c# J6 B7 `; k
  (3)或是您知道其他製程, NRE大約多少..., b( f; G* ]3 T& n6 q) U
) v5 ]% f: e2 D; o( y7 U8 N
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2#
發表於 2009-8-14 01:17:51 | 只看該作者
Which design service company you will go to?
" s3 B6 g3 o7 mHow many mask layers it will be?/ T2 |; j# J& D+ [
Besides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties?' i. _1 q! g& D4 q
How many chips you need? A full set mask or MPW?
/ R; u9 W$ w' L3 d% s2 j6 q% X' eWhat package you need?
3#
 樓主| 發表於 2009-8-14 08:59:04 | 只看該作者
Well,
/ y( ?4 `/ k5 n% Z7 B  e6 A; \8 T- s( D3 p% T, n! U6 ?
I just estimate the investiment of a ASIC team.3 w, p- _. Z- ?( A' {2 Y9 c) m
not servey for a project.( ~: g8 j' J5 f: m* Q
So, I just want to know the range of NRE.
, \( R) X3 N! h4 p  X# Q; n. F
' z# n; y9 s) R1 w8 |7 MFor example, It will be + `' H2 Z  R' _, b, J, T0 L/ h
(1) 5,000,000 NT$ ?
3 _- n4 _7 v4 j: C% S, k(2) 8,000,000 NT$ ?
9 B  ^/ A5 W! ~9 z  t* }/ y8 g. i  [(3)10,000,000 NT$ ?6 S+ o6 C, J* g  y9 c7 r( P! e; L
(4)12,000,000 NT$ ?/ Q) l& z/ G# r0 d$ ]
(5)15,000,000 NT$ ?# W9 N; v  d& h

# Q* f# C% {" p- u  x8 H- B' dSure, I understand following things:
* G& o% p- U# x+ I - full set mask cost more5 k  L, c( @& x0 }% w
- PLL/LVDS... analog IP are extra cost& O( M: v+ _7 _5 r/ R, ]. Z
- pin-count and area also influence cost
0 ^6 n% w/ g. F+ r - different package also cost different: i* w- m5 V2 B8 s9 w" a
; {1 n7 h8 S$ R. T! X9 R1 z: a+ V
Therefore, if really need information for estimate,# ]& |' H* u' y9 C1 ?) m9 x
just for example.
8 r4 i0 G$ ^) w4 w9 v+ @Let's assume a SoC for FullHD TV application
$ {/ {$ m& K  Y, R+ hit will include
7 d7 N! y/ l# [4 O7 b. X! K  - ARM AMBA
# ^: }! |& f+ S$ M% K  - DDR2 I/F( B9 ]* Z/ M& W2 J- s5 x
  - GPIO, IIC,...
& |# A/ `# a- F; @! ^  - LVDS out (dual link)
9 s* m$ D: s/ O; k  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,. Y/ L. Z9 h0 N% d' ?, V
  - 12bit ADC, 10bot ADC x2
; S( o; o3 s2 Y! j1 H! _  - PLL/DLL3 [4 M* f5 k2 b4 K
  - 256 pins 以上
0 c( W4 O$ A+ G' B3 L  X4 {- d9 m
4 h' p! l: x. ]. nThan,... any idea about NRE fee?
% x# P2 ]1 P1 T  Jagain, I just want to know the range
4#
發表於 2009-8-14 09:25:01 | 只看該作者
if the ARM and AMBA is hardcore,
3 d* P+ C& M* J' _basically 65nm-->USD$1M above and 90nm-->700K above
" T8 M; I: K) t% t; nand base on different foundry has difference price!
" ~, T. F# ^0 \" ?0 j' fthis price did not include any specific IP like TV encoder, decoder, vedio codec....
7 Y( d. Z, j/ J# C2 @7 q# {9 uand did not include the ARM licensee...* v/ U7 X6 X  q* U
actually! it is not so much IC design in Taiwan tape out 65nm till now!
5#
發表於 2009-8-14 09:28:45 | 只看該作者
sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer)
; R" b' K/ v3 \4 K6 h' q6 D* Land package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!
6#
發表於 2009-10-22 11:06:45 | 只看該作者
need 1M dollar?
7#
發表於 2009-12-15 21:05:38 | 只看該作者

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