請教90/65奈米,SOC Tape-out一次NRE大約多少

ajack

如題

請教業界各位先進
目前的chip開發,需要多少投資?
首先是假設 Febless design house.
自家由algorithm 到 RTL simulation 完成
' E0 m# G6 \$ f. t後端包給 backend service 公司 (layout, mask, Fab, assembly..)
以 ARM9 or ARM11, AMBA2.0 為platform
那麼
& e- j% c1 p+ J) e  (1)90奈米, NRE大概多少?
9 }" O1 n* Y) f  M( \  (2)65奈米, NRE大概多少?
  (3)或是您知道其他製程, NRE大約多少...

謝謝

hkgcrcom

頂頂更健康，支持一下。                                  qq自由幻想外掛

semico_ljj

need 1M dollar?

alex3010

sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer)
and package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!

alex3010

if the ARM and AMBA is hardcore,
, a8 |% R, U. f  F1 c, kbasically 65nm-->USD$1M above and 90nm-->700K above
and base on different foundry has difference price!
$ ~! u6 J/ Q" p7 Hthis price did not include any specific IP like TV encoder, decoder, vedio codec....
9 x! w1 W  a) j/ ~and did not include the ARM licensee...
actually! it is not so much IC design in Taiwan tape out 65nm till now!

ajack

Well,
( p+ U8 Z: A* I! A
I just estimate the investiment of a ASIC team.
not servey for a project.
% p+ s9 a4 _3 R. J+ Z( W9 e3 nSo, I just want to know the range of NRE.

: M% ~4 E) u" QFor example, It will be
" }3 H1 ?; H6 X% L( c4 `+ p' _+ j(1) 5,000,000 NT$ ?
/ W% Z4 S# Q1 F4 k) ~9 p6 C(2) 8,000,000 NT$ ?
6 j: I. m' ^& H- ]6 v3 t(3)10,000,000 NT$ ?
(4)12,000,000 NT$ ?
(5)15,000,000 NT$ ?
9 s& C% w/ L1 I$ L7 }
" W4 ?7 J1 o' F, S8 @Sure, I understand following things:
# y; q: }5 c$ e - full set mask cost more
4 O3 ~& ]4 O6 @ - PLL/LVDS... analog IP are extra cost
: s& F  g0 S' `6 C6 Z - pin-count and area also influence cost
$ T; W6 `& {' D' m - different package also cost different

Therefore, if really need information for estimate,
9 z: t; g6 `- p* `9 q+ ^5 `: T  Rjust for example.
% T" O0 j- X/ ^7 I" CLet's assume a SoC for FullHD TV application
+ j/ X1 q$ [, b7 J" m6 n$ Pit will include
3 \3 o+ p- x* J, u' d- r$ {: W  - ARM AMBA
  - DDR2 I/F
. G: N: v0 k, M  - GPIO, IIC,...
  - LVDS out (dual link)
/ X! q0 S2 s/ I* t" S/ x  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,
  - 12bit ADC, 10bot ADC x2
  - PLL/DLL
  - 256 pins 以上

Than,... any idea about NRE fee?
, X6 E1 s! X: `% x. aagain, I just want to know the range

elroy216

Which design service company you will go to?
How many mask layers it will be?
Besides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties?
How many chips you need? A full set mask or MPW?
  T& [8 _- \! [. V3 @( b8 j# B6 @* {What package you need?