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In order to save test device, usually will do Power to Ground then IO to Power/Ground and the last is Io to IO.
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The reason is:0 i' j' r% c: U! {3 c- ?
1. If power to ground can not pass, the rest combination has less chance to pass% @; d$ {( n) z) V; A: Y3 N% n4 l
2. Usually power pin count is less than IO pin count. It is fast to get an idea how the chip's ESD level; J) {# e# o0 C/ i
3. If failed, it's easy to find the failed ESD zapping combination |
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