IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture

michaldl

Sponsor
Test Technology Standards Committee of the IEEE Computer Society
8 f$ r9 {3 [" @' B( R6 e2 pApproved 14 June 2001
/ w7 t$ h- {7 }; I& V2 W7 \IEEE-SA Standards Board
( f2 i5 V8 U2 x- [& iAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
support of assembled printed circuit boards is defined. The circuitry includes a standard interface
through which instructions and test data are communicated. A set of test features is defined,
8 c1 D  x/ m7 _9 cincluding a boundary-scan register, such that the component is able to respond to a minimum set
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language
4 Q+ n. O# x  E# Q+ b' u, qis defined that allows rigorous description of the component-specific aspects of such testability features.
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2 l# Z  j4 ]7 E' F/ UKeywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
4 W$ B7 x; y  T2 n) w0 y/ xboundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
' c6 l. @+ ]7 @. G* V3 j) OTAP, test, test access port, VHDL, VHSIC Hardware Description Language
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