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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement
4 O* x0 o. ^( A: vwas to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the( }& ~+ U# J7 n% g4 Q
combinational signal in the sensitivity list, so do we!"8 ~! w6 b: l) a( {! k* e
Example 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational
4 ~; `/ s0 @$ V: I) Jsensitivity lists for the combinational always block of any of the three always block fsm1 coding styles.
9 C- l! Y; w8 n# ~
7 T3 @6 y/ u( d! h" N" l6 D5 Jalways @(state or go or ws)
) K- H" I% N- l) W0 ~" jbegin
+ R z* h( I4 P% L. V/ T' r( Q...( d( ~. m4 y% A; J3 J, z
end" {/ _5 H0 i, E# j) k
//Example 1' W6 o: Q f P, c. s
1 l- u7 W& k+ C7 _& w2 g
5 ~) I x" K0 B0 {1 Palways @*
8 [- T! j# N, m; ebegin
: O& k/ l- j' u$ Y3 P4 y3 v4 F2 j+ v...
1 j5 B! x% n! E+ M1 V" eend; E$ T. X& L V# t9 q. i
//Example 2
6 I: R; C* H1 u# z
3 E9 d. ^% f+ C6 L% v, DThe @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without
: Y. U1 e4 R1 H T# h, cparentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open" B" C9 N% E7 l, ^2 p$ u
a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this
, {+ q* t3 s; R" |$ W, F( [; Acombinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not
4 y! v/ z" d0 L6 B4 Y2 ^ shave to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage# L* V) A2 j/ o' P3 [
of the combinational sensitivity list to the @* form., P7 W' J5 b P$ F7 c- Y. R! Q: F
always @*
8 m$ G: T. p8 x0 d% S$ n% xalways @ *2 e' _; o7 ~6 R4 x
always @(*)
& i% k( D1 p; H7 p" f3 G$ Kalways @ ( * )
$ f. J& b( w, ~7 g7 @' {( N- l1 J//Example 3 |
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