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For ESD test (HBM)
* p1 w0 o j* Q8 b. w9 nThe following are the test combination:/ K8 z+ Y7 s5 t! d7 J; E+ ]/ G
1. Power to Power& R ]* K; }0 |/ N% }* X
2. Power to Ground. f, E* }; p( i- A
3. IO to Power
$ L% i* n& x }2 c4. Io to Ground# u# R# y4 P w: n( s7 \, f( P
5. IO to IO: ]% {* s0 T( V! m2 |4 G2 D
(different power domain need to be treated as different power. For ground usually you can treat as one group_silicon use substrate as common ground. But if you measure two different ground pin/ball > 2ohms. It should be seperated as 2 grond.)
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- }+ J! E; J8 z+ Bthe total zap time fomula will be~ 2(+/- polarity) X (IO#X(P#+G#)+IO#+P#X(P#-1)X(P#-2)X...X1+P#XG); t& ?4 Z2 R2 c' v9 p, f7 y: t
For example: You have IO1/IO2/IO3/P1/P2/G18 ^& b1 t( T7 D! H- W" D7 d. _
2x((3X(2+1)+3+2X1+2X1)=25(multiple the zap interval)
, W& N, k' W- c7 `9 @! aSo for high pin count it will take a lot of time. But it won't take more than a week(for one chip). $ N( j$ a: I' ?# K3 }
4 @4 Y6 e% t, s3 I) E# XFor your reference. |
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