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Senior Digital Design Engineer7 ~ v$ b/ ~. M1 d' T
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公 司:A famous European IC company% V$ E' X' [, S4 F' I, g' r
工作地点:上海
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Job description . Q% q1 X/ b+ S$ ~: O
- define system partitioning of s/c circuits and system . L( u, ]! [3 T, f% R5 j% ~" y
- define HW/SW co-partitioning . T% T/ {& w5 @% n, \! J/ n0 T' F
- provide technical feasibilities based on system simulation and/or FPGA based demonstrator 5 d- w; T+ {: u( E% e% h8 _
- propose new technical solutions on s/c and system level
" g2 J( F% ~% T- a2 c- design digital part of mixed signal (smart power) ASICs 5 j# O5 q) J. z; t0 p m
- close cooperation and interaction with international teams ' D9 P' `" {4 K" z3 G
- coach junior engineers
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& a3 s/ k- G- t- v# c" Q# YRequired knowledge competencies and attributes
5 Z* c! W$ T) h! I0 W- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent) $ [: B8 R* s9 R; ^
- > 5ys experience in digital design
2 o6 g4 I" N: b; v, ?) o- good understanding of ASIC mixed signal flow (Cadence based)
+ E$ _, ~0 a3 E- strong background in HDL coding, verification and toplevel integration
. O& {, |" n0 A; O. c3 ~- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)
2 y9 [& u$ L. {. u- experience in FPGA development / F# ~5 v' o# V- h6 f6 u5 |; W
- very good communication skills (written, oral) " a/ T* q6 D: x3 r5 r" q3 T* q
- self motivated and high level of flexibility 5 J+ W! d- A+ y$ @) |9 C i
- foreign languages: English, German (not a must) |
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