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[經驗交流] 請教90/65奈米,SOC Tape-out一次NRE大約多少

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1#
發表於 2009-8-13 10:26:46 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
如題! ~% l& Y- @% _2 L, s+ A$ A5 m; l
. ]8 p5 x# P) E- h
請教業界各位先進; A8 A  C# f" B( n! V
目前的chip開發,需要多少投資?9 s2 P6 x8 B7 ?9 m; S1 {& z
首先是假設 Febless design house.
& ]: h; k7 i1 R! L自家由algorithm 到 RTL simulation 完成
' T! ]$ C( {9 n後端包給 backend service 公司 (layout, mask, Fab, assembly..)1 L5 y3 s, U6 }7 G$ W2 \
以 ARM9 or ARM11, AMBA2.0 為platform. L$ O" {+ c" i* ~  m7 n
那麼
& Z( y1 q/ H! `9 L  (1)90奈米, NRE大概多少?
, a( Y+ U% p$ w6 ^  (2)65奈米, NRE大概多少?# Y/ p0 i, @: l* s# D9 u6 t
  (3)或是您知道其他製程, NRE大約多少...
2 o/ o' P0 z2 {% C: C) y% d2 n7 G; X; B8 P- Q1 [3 f' c8 {2 g
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2#
發表於 2009-8-14 01:17:51 | 只看該作者
Which design service company you will go to?
8 z6 V. J# {" \8 nHow many mask layers it will be?
. j- l3 b$ o4 Q+ [Besides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties?
  w9 J2 X+ C! g; {& Z  tHow many chips you need? A full set mask or MPW?; R' g) e3 M) ^
What package you need?
3#
 樓主| 發表於 2009-8-14 08:59:04 | 只看該作者
Well,9 p. \4 |/ m: R( e/ o

& @! @7 i3 D) g+ {I just estimate the investiment of a ASIC team.
4 ]7 p1 s6 u$ L0 v" }not servey for a project.
. d" t8 I! q7 `+ T/ j! oSo, I just want to know the range of NRE.7 N2 o) W1 U, y) M1 e1 ?  A/ d4 U

- {9 u1 k  q- d! F4 oFor example, It will be 9 H- N% C9 o, q( d
(1) 5,000,000 NT$ ?; X% h9 w- x9 g8 N8 a
(2) 8,000,000 NT$ ?
* }( i5 U7 k% |6 \9 |(3)10,000,000 NT$ ?
' g4 u# x6 z. w5 t0 u* f$ F$ L# a(4)12,000,000 NT$ ?" z3 e7 u1 P& v2 u( y* a
(5)15,000,000 NT$ ?
6 [8 u; z+ b% }( V5 Q. s
0 N* D5 f- n; R( c* X; ?Sure, I understand following things:
0 J% z1 U. @/ N - full set mask cost more$ w0 F# v+ D# s3 j  Y
- PLL/LVDS... analog IP are extra cost' V) s, `- t" [5 c% w% i5 I
- pin-count and area also influence cost9 n0 s' w' Z( L+ r+ Q! ^
- different package also cost different2 e+ Y9 T/ _" l' A' h' i2 z5 ?
8 C- `$ y7 L5 N5 K. y' P5 J
Therefore, if really need information for estimate,
9 V0 X, d" h0 P3 M5 }just for example.* ~: D4 {+ H6 [: [
Let's assume a SoC for FullHD TV application
1 M9 W( ~( }- i+ ~. h: R+ R, Dit will include. m' V) V8 A( ]8 {" K( Q+ [+ }3 x
  - ARM AMBA
/ o, X/ L. d& l/ A  - DDR2 I/F. N) q) `  h4 S0 p9 G7 _# E
  - GPIO, IIC,...7 I' O7 Y. Z/ n
  - LVDS out (dual link)" l0 W6 w% s' v; J; o
  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART,
  ^/ O. f& o4 e7 V  - 12bit ADC, 10bot ADC x2+ {! z1 B7 T7 t$ [$ j, A
  - PLL/DLL
* e7 y6 ]# d( U  - 256 pins 以上& s# W( P7 Q1 r9 C$ K8 r* S2 r8 u8 @
5 h9 n3 J' X( T) H) O
Than,... any idea about NRE fee?4 C$ q- q7 J* Y
again, I just want to know the range
4#
發表於 2009-8-14 09:25:01 | 只看該作者
if the ARM and AMBA is hardcore,
( f; I+ J8 ^; }# [6 a  sbasically 65nm-->USD$1M above and 90nm-->700K above
: `& s8 l( K1 }8 e. g# z; tand base on different foundry has difference price!
  y, ~( i) n( wthis price did not include any specific IP like TV encoder, decoder, vedio codec....
$ g9 U. T6 O. H' j1 Zand did not include the ARM licensee.... ?& ?5 L& M6 W/ O1 r3 s
actually! it is not so much IC design in Taiwan tape out 65nm till now!
5#
發表於 2009-8-14 09:28:45 | 只看該作者
sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer). E, o" _1 b% B* D
and package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!
6#
發表於 2009-10-22 11:06:45 | 只看該作者
need 1M dollar?
7#
發表於 2009-12-15 21:05:38 | 只看該作者

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