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這應該是APR的論文
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Abstract:
* o- W+ T- x# D. X6 s* JParasitic interconnect corner methods are known to & t9 E" r& A4 [. Q/ k: [. i
be inaccurate. This paper explains the sources of their errors and
& {% a* { `. N8 e$ Pshows that errors in excess of 22% can occur in the predicted
9 d7 g1 M- |8 ]! Ucorner delays of a multi-layer stage in the presence of process1 q7 G2 }, L4 h1 _, W- i+ V* y
variations. It is shown that exhaustive corner search methods are0 }3 ?' D# u- p+ L) ?8 U
infeasible in practice as they have an exponential complexity in
9 h. ~2 G7 ?2 l) `4 g1 }terms of required SPICE simulations with respect to the number0 w$ O& r0 R. G8 `5 ]) y
of layers a stage is routed through. This exponential complexity
/ f" X+ U( I& x( X' bis reduced to a linear one with a new simulation-based search: S9 v6 z2 A0 k" a' z# J
method with the aid of stage delay properties. The ideas behind) s" e3 C2 V) e: P
the simulation-based methodology are shown to be expandable
1 u! U+ U) l" j) W4 D. P- x' qto an analytical-based multi-layer performance corner location
+ q" S3 d" R, j4 f0 t/ Jmethodology. The simulated best/worst case delays based on these- D( ]" |5 ]5 x3 d8 K7 F8 u7 {
analytical corners produce errors below 4% as compared to the
, T# X$ f/ G5 \' H) n! x4 |, yexhaustive search simulation based method.
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[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ] |
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