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Senior Digital Design Engineer9 O% b4 X% d% Y) j6 F
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公 司:A famous European IC company
3 t* `& q/ t, T# h" i工作地点:上海
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* S; j! r6 r) _% h9 X0 FJob description
5 }; w. h+ s9 W; r# G- define system partitioning of s/c circuits and system
+ F8 M: f0 A& O- define HW/SW co-partitioning 9 F, |2 B: \! n$ b# \% i
- provide technical feasibilities based on system simulation and/or FPGA based demonstrator 0 U) I: O0 @7 E3 L
- propose new technical solutions on s/c and system level
# u' A! P( N% ?+ d4 t- design digital part of mixed signal (smart power) ASICs " ~# U( Z& b2 \5 T8 N/ L: o M
- close cooperation and interaction with international teams
( e' ?' K) t* p3 s8 [- coach junior engineers ; R i* k7 S& |' E
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Required knowledge competencies and attributes
% U( L6 m. r& M! G2 K- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent) , q; }$ C* A' O! J
- > 5ys experience in digital design 9 J( e/ A9 p+ {: ^. u5 B/ m( ]* n" R
- good understanding of ASIC mixed signal flow (Cadence based)
% Y; O* h7 A' h# O6 s( `) b- strong background in HDL coding, verification and toplevel integration , \2 J+ g4 | r& h7 O
- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray) 4 p* c1 n; U; d; K) [: G, m, ]1 S
- experience in FPGA development
8 t: U/ @6 c$ b4 X2 |" b& q- very good communication skills (written, oral)
/ X$ u5 Z4 p' Y& [- self motivated and high level of flexibility
9 i3 \! P E4 R7 o! q- foreign languages: English, German (not a must) |
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