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Senior Physical Design Engineer
, i: t$ r0 p- C( x+ h1 _0 w公 司:A famous IC company$ {% K q" s! o* I4 W- h
工作地点:南京; ^0 E& s8 ]8 r3 @' O
) t n- } C0 K& F& OKey Responsibilities
" \' I% V2 B1 QDepending on experience, key responsibilities will involve some of the following:
- i. b/ G: w) `' |IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
4 x% w2 e& p) `: o% D) v% NAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed. : S) }2 ^4 F; U7 m
Leading a team of physical design engineers and resolving the technical related issues.
' b L4 b* j# m; ~& ]* d- {/ a/ u6 ECrosstalk analysis, power analysis, and static timing analysis. ! S: {9 {5 i, ~) k3 c
Write scripts in Tcl to improve productivity.
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Experience: 5+ years in physical implementation engineering
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5 D, q$ b* Y; {; V; I7 pEssential skills
8 c. g0 H# Z* a O! OMS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
$ U! S9 e9 |4 `Experience with Magma or Synopsys place-and-route tool set and physical design project implementation.
8 D9 S4 u" ], t& p+ C7 Z, pGood programming skill. Capable of writing Tcl or Perl.
! d h0 x! @3 E1 q0 G9 sFamiliar with synthesis, static timing analysis.
, n; ^: i7 t/ o8 q6 ~5 RSelf-motivated team worker, good verbal and written communication skills in English.
; D5 g( Q7 i, f' V3 GTechnical and team leadership proffered. Previous management experience highly desired.
( A+ l/ O8 ^, {) |2 _( eExperience with synthesis, DFT, and verification is preferred. |
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