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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement
6 \4 p! o- w- F9 b+ H) a5 Zwas to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the
9 H% @# q$ ^- W. s! H" l- v2 c3 Ocombinational signal in the sensitivity list, so do we!"
% `& v ]: [, O$ `, xExample 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational+ c+ A5 x8 h( L- b2 ~
sensitivity lists for the combinational always block of any of the three always block fsm1 coding styles.
$ |! R1 F: D8 T, Z% Q4 l* k9 f! u* E. N+ P$ F8 w
always @(state or go or ws)
* \2 M* e. Q. Nbegin
9 J! p/ r! x8 {9 c- `+ S- \.... {# ?8 E# z6 s0 h0 h, @+ l$ X! p
end; I! K- {9 [% p
//Example 1
' g9 g `; D% g- |% \
6 c4 U) f: ~- @
" Y% W" M; C5 A* a( z/ N* Balways @* z$ }$ B5 C; ]
begin6 q. B$ A' A5 H) B: g o( j
...
- V0 f0 K# X+ ^4 K6 \end
1 ~; r& t! e: p6 U3 O//Example 2% G2 g- S ^0 h: O* z# ], E; h
, z- t& i0 U3 _* @The @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without8 \0 b; H- d/ B) `
parentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open
; l E' ^* D+ o5 T* t; }a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this- _ t; W* u6 D; u( X( C
combinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not* D$ q2 |$ D; [* {+ k
have to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage& J! V% g' w6 x1 M$ `
of the combinational sensitivity list to the @* form.
p1 _& f: c2 |6 e& `always @*- K$ R( D, d( i2 k/ [9 ]" d; ~
always @ *
" Y/ @* y; H* H7 l8 Q& calways @(*)% n3 Y1 X% {3 z) _+ e
always @ ( * ). O* d& X( @5 \% n
//Example 3 |
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