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AMD Geode LX 800@0.9W處理器 II
Display Controller3 b1 M. x& J$ c8 E) {# _$ ~
■ Hardware frame buffer compression improves Unified
* B: d% _8 Z, u- X1 FMemory Architecture (UMA) memory efficiency
4 y+ o1 P, |* B Y7 p■ CRT resolutions supported:
& U- u2 o4 G& e9 J' y/ p: Y— Supports up to 1920x1440x32 bpp at 85 Hz- R$ G& f) M5 j
— Supports up to 1600x1200x32 bpp at 100 Hz
* M6 d& r3 K$ ?■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT5 e; C5 [5 M& h9 K
■ Standard Definition (SD) resolution for Video Output
& {& I% t6 @2 U6 a$ `Port (VOP):; f& L6 a( g3 C1 ?) p! o0 @2 `
— 720x482 at 59.94 Hz interlaced for NTSC) T# s1 c2 p, j) z6 k
— 768x576 at 50 Hz interlaced for PAL
6 R: a2 d; ]6 n2 H- F■ High Definition (HD) resolution for Video Output Port
" o9 X6 C; d& }(VOP):& I6 W) B" X3 a8 P8 |* E1 V
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
! g. u4 S4 S$ W$ Y% \# _(74.25 MHz)
7 `0 z; @6 L3 Z8 X6 P, \: R6 g— Up to 1280x720 at 60 Hz progressive (720p HD)2 X; ~4 T5 F$ o) L n
(74.25 MHz)3 y9 D# `7 c: g! u3 o& h
■ Supports down to 7.652 MHz Dot Clock (320x240& D; p4 G9 m5 }' F9 ?
QVGA)
4 v4 v& c7 d0 |4 f4 T■ Hardware VGA1 B" S8 o$ M/ B5 g: F4 V+ X( A. n
■ Hardware supported 48x64 32-bit cursor with alpha
; j: f3 W, |4 xblending
, M+ w2 b/ _0 P" Y' KVideo Processor
. H8 Z+ `4 U2 L, o4 ~' p, Y' B; A" A■ Supports video scaling, mixing and VOP
" A5 {8 h! A, Z6 L1 m3 F■ Hardware video up/down scalar2 E0 w5 T# H9 ~% P% t( ]. N
■ Graphics/video alpha blending and color key muxing) n; w: I+ Y4 ?
■ Digital VOP (SD and HD) or TFT outputs6 G- F8 x+ P# t* K; f/ W. A; }
■ Legacy RGB mode* F* j5 u# t r2 r" M4 Q! g
■ VOP supports SD and HD 480p, 480i, 720p, and 1080i2 m. R5 l6 j9 ~* a8 l
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
* X' B4 y$ I. z/ ~* z& n, ^compliant) `( d/ D5 ~( L# b" m. M8 _6 C; M: s) ^
Integrated Analog CRT DAC, System Clock PLLs and n8 l4 k y2 n0 ?/ Q1 C
Dot Clock PLL
/ w4 E+ A& T/ I. P& q) k■ Integrated Dot Clock PLL with up to 350 MHz clock
% } c' H4 Z7 Q) g■ Integrated 3x8-bit DAC with up to 350 MHz sampling2 W7 P$ A# o0 x/ }5 d! {
■ Integrated x86 core PLL
* F3 n8 K( I2 B0 E% n# ]1 j■ Memory PLL
% \5 P* C5 P4 z' J7 ]" uGeodeLink™ PCI Bridge9 ~0 X" p+ U1 J8 @( b3 r# i
■ PCI 2.2 compliant
+ { E: p. ~# T% v$ g: L■ 3.3V signaling and 3.3V I/Os! d- g G6 @7 O1 M' S# |- T
■ 33 to 66 MHz operation, T8 N# J1 T' O
■ 32-bit interface( X5 @9 K, v3 I/ u; W: ^
■ Supports virtual PCI headers for GeodeLink devices
9 W! A* d' l/ _+ X7 I$ X8 t, o) SVideo Input Port (VIP)- J9 d% S) ], }5 y& e8 e
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit+ ^7 Q/ P. J g+ R- y E
■ Video Blanking Interval (VBI) support
* I5 `5 V3 Z1 K6 s. N■ 8 or 16-bit 80 MHz SD or HD capable
' {. ~" Z( u% L6 c- a- E2 n5 l4 cSecurity Block7 d/ _ {( u Q3 q" c
■ Serial EEPROM interface for 2K bit unique ID and AES- @& u: z$ S- g' Z1 V( m: Z, x
(Advanced Encryption Standard) hidden key storage
; ~6 f6 s- C% W! w- g0 z6 B3 P(EEPROM optional inside package)8 q5 u: p* C4 R
■ Electronic Code Book (ECB) or Cipher Block Chaining
+ T- ?; v6 n8 w) ?. W) l& r( f(CBC)128-bit AES hardware support) K! p6 J, |9 H9 [2 n x8 P, h
■ True random number generator (TRNG) |
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