CMOS Transistor Layout

semico_ljj

CMOS Transistor Layout

, G6 s; ^/ i9 ~4 m6 tCopyright © 2005


0 ^, g8 l! Q, ?) N) RTable of Contents

Preface
. h) H3 b# Y- {: P/ v) k9 [1. Introduction .................................................................. 1
2. MOS Transistors ........................................................... 2
/ }  o; l% I1 C6 a% m2 T3. Fabrication of MOS Transistor ..................................... 5
2 M% L8 {& k/ U1 `  ?4. Layout a Single Transistor .......................................... 11
! t. B. h1 Y: p% @+ c0 U" ^First Stroke The basic transistor layout ..................... 12
3 T) S; ^6 a* w5 DSecond Stroke Compact the transistor layout ................ 13
8 u6 ?7 p; ~8 u0 }Third Stroke Speed up the transistor ........................... 17
% V/ S% g' h% b* QFourth Stroke Clean up the substrate Disturbances ...... 20
; i7 z$ [! |( a- q7 b% F. ~Fifth Stroke Balancing area, speed and noise ............ 26
% z' [' a2 ]( h9 T: Q; |% O' H9 {Sixth Stroke Relief the stress ...................................... 29
3 y* X/ O( S3 U! g. X; L+ pSeventh Stroke Protect the gate ...................................... 30
Eighth Stroke Improve yield ..........................................32
$ \+ y  F' R% V. T' V5. Layout Several Transistors ......................................... 34
2 u$ J- y" k* V# u# r+ lEighth Stroke Improve yield...........................................35
, U: K0 A- E* z+ x' CRe-visit
Ninth Stroke Close proximity .......................................36
Tenth Stroke Interdigitated layout ............................... 36
) G3 _" B. r0 n. ]Eleventh Stroke Dummy transistor ................................... 41
3 D# E2 D7 C  l" VTwelfth Stroke Two-dimension interdigitated layout ..... 43
1 A# u0 [# h$ k1 V- rThirteenth Stroke Guard ring for the matched transistors ... 45
Fourteenth Stroke Keep NMOS away from N-well ............ 45
# D3 m6 H- s" `, [) V4 F& wFifteenth Stroke Orientate the transistor ........................... 46
Sixteenth Stroke Match the interconnects ......................... 47
1 A/ W4 |9 G; E9 H+ MSeventeenth Stroke The unmatchable .................................... 50
6 v( N6 s9 Q# j$ u( j7 o6. Verifying the Transistor Layout ................................. 52
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1 P7 v7 W% S4 }/ }: ^[ 本帖最後由 semico_ljj 於 2008-11-1 04:01 PM 編輯 ]

semico_ljj

这本书的下半部没有找到，不知哪位有的话可以共享！谢谢！

semico_ljj

Preface
3 a# t! A5 z. D. p* @3 ~Many IC design books emphasize on circuit design theories and there is
little coverage on custom circuit layout techniques. Hence this book is
specially written to focus on the custom circuit layout techniques. It is
! F8 r8 G2 R! I( x+ Wan easy book for the custom layout engineer as prior knowledge on
circuit design is not necessarily required to understand the content of the
; q0 J' ?5 J6 @0 J/ \* p. a, k2 x4 [4 Kbook.
$ z( y3 {# l5 |  m; t# jThis book is written for two groups of audiences – New & Experienced
9 J/ O1 q3 s" fcustom layout designers. The new comer to custom layout would benefit
" g: W' ^6 z4 `( I  Y+ N9 w5 lfrom the wider perspectives in implementing the design to a layout. The
4 }& K  D, {9 @4 g0 r( i' Aexperienced custom layout designers, on the other hand, will have a
# _$ A8 {) b2 X4 s- Ubetter appreciation of the rationale behind the layout practices.

semico_ljj

这本书Layout基础知识讲的很不错的，可以好好研读一番！