A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
stage for a given system is
. n& o, f" t- x- {9 C) N/ `around 70% of the overall design
effort and schedule time. Reducing
3 G/ o: {7 a) _, a9 p3 Voverall time spent in test creation and
; h( J8 ]& J5 \# v& Tdesign verification is a high priority.
Success in these two areas increases
) a& h" Q5 M8 Y6 y+ Z$ jproductivity and helps deliver products
0 W) P  ?- z/ H$ w3 U. Hto market faster. To achieve these verification
8 H/ X; Z9 W  A$ u) Dgoals, engineers are constantly
* S0 T% _$ @, x% q" Nlooking for new and innovative ways to
# F+ j# `+ V6 L/ \0 |& @0 Sconquer the verification challenges that
" g6 X, \' _1 j. }" m  E( eface them.
, g% V" B5 B3 I2 H) G) NThis article discusses a layered verification
5 y  H# Z0 t4 T$ gapproach as applied to an AMBAbased
system component. The layered
0 e+ X5 B; q& h/ i/ qapproach is used to create a standardized
verification environment that can
6 y' k7 T( U3 Z6 F. jadapt as the design challenges
8 `  i# d! q. v. bincrease. Typically, reuse is very high
within an AMBA-based system because
7 P$ y+ q/ w$ u* y3 Kmany new designs are based on earlier
( ?/ M3 Q& C0 V. V: }! ?) Oversions of the standard system. The
example shows the layered approach
being applied to verify an individual
block as well as its integration into the
subsystem and final system representation.

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