A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
stage for a given system is
, O0 N$ ]4 ^* O2 R1 Saround 70% of the overall design
7 }$ }7 T! B4 i! J7 a+ h  C/ {effort and schedule time. Reducing
overall time spent in test creation and
design verification is a high priority.
Success in these two areas increases
0 q" ?# E& V2 [productivity and helps deliver products
# |% h+ z) n5 G) Q& o% nto market faster. To achieve these verification
goals, engineers are constantly
2 v+ X5 b8 e) @0 D- [" ^6 xlooking for new and innovative ways to
conquer the verification challenges that
face them.
- ]8 H$ p& B0 W& \This article discusses a layered verification
9 ]* _9 u' a) Papproach as applied to an AMBAbased
4 p. B8 ~3 T! i5 i2 C, _system component. The layered
& B. l1 q4 [7 E: N$ [9 N* gapproach is used to create a standardized
2 ~1 D- b7 [2 t/ Q8 cverification environment that can
" Z% g+ _; K2 I  |adapt as the design challenges
( j, Z% i+ J$ O$ R- _increase. Typically, reuse is very high
# g! D; r( Y- o, J! W8 Q0 y8 Ewithin an AMBA-based system because
many new designs are based on earlier
versions of the standard system. The
5 I: r; x- _  Q( P( aexample shows the layered approach
being applied to verify an individual
block as well as its integration into the
0 g' c) |* x0 _subsystem and final system representation.

femark

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