A Layered Verification Approach Applied to an AMBA-Based System

phoenixfeng

It’s common knowledge that the verification
, W1 x+ W4 {" u+ i8 t! {stage for a given system is
around 70% of the overall design
: n, w( W0 B9 X* ?+ K* f$ E) Keffort and schedule time. Reducing
5 a  x6 ~* b3 @overall time spent in test creation and
design verification is a high priority.
Success in these two areas increases
productivity and helps deliver products
9 L& c( _" \) d% Z% E- h  ]  Yto market faster. To achieve these verification
goals, engineers are constantly
looking for new and innovative ways to
; g% a5 F. N0 k. u3 A+ |conquer the verification challenges that
+ L1 c1 z/ g* h! O( ]face them.
This article discusses a layered verification
approach as applied to an AMBAbased
system component. The layered
6 c* g" P4 g- u$ V$ a4 lapproach is used to create a standardized
verification environment that can
8 X( S, P& N5 }8 X' \adapt as the design challenges
9 a: a6 U8 }0 j9 F- O  Q, E9 r* e# Bincrease. Typically, reuse is very high
# \) |. H* [# T# _8 M& n; Iwithin an AMBA-based system because
many new designs are based on earlier
5 A* V; G; d2 d0 n: e( g4 K) aversions of the standard system. The
2 R: w! c8 r1 c8 Wexample shows the layered approach
. {) F% a" m1 z0 `- V7 ybeing applied to verify an individual
8 \/ I$ m1 ~! Y4 T8 ?block as well as its integration into the
, F& g& m$ i1 Y6 a+ ?# U( s2 P7 xsubsystem and final system representation.

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