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很多免費的Xilinx教育課程

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發表於 2007-6-23 23:14:15 | 只看該作者 回帖獎勵 |正序瀏覽 |閱讀模式
底下是台灣Xilinx代理商安馳科技所舉辦的免費課程, 報名人數夠就隨時會開課, 給大家參考一下, 想上的人找安馳科技報名吧 TEL:2698-2526/ S  k5 R4 J% J+ Y% S
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另外, 最後二個課程好像會晚點開的樣子
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1 Y; Q. R3 Y" L% W9 B# ~ISE(I): ISE design flow! j3 d6 D6 M! m" P, Q$ g
Speaker: Lilian
: ]" n; V' r1 k* l" r  P1 v9 wContents: ISE design flow, design constrain, schematic design, FSM design and optimization, pin assignment.
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ISE(II): design performance improvement
2 V" \. ?  H7 n* z# L( S  B- BSpeaker: Frank* U' F7 `; t& u
Contents: timing constrain and reports, floor plane, FPGA editor, NGC / EDIF project, smart guide…
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5 J! \1 K- I* R3 yModelSIM:: \4 r3 b$ z( O
Speaker: Frank5 S1 y& O+ Q/ u
Contents: RTL code pre-simulation with ModelSIM, Simulation your design with Xilinx libraries.! a  E/ v: v+ c) M; o+ P

* ^; r% {/ ]2 dChipScopePro:0 m* @9 l9 C+ w; s' H
Speaker: Jeremy
9 E, U* f0 q' rContents: debug your design using ChipScopePro.% y$ h6 j% P+ @4 X  |% P

: a- y9 J! E- o1 g+ @5 w9 FEDK(I): generate Xilinx MicroBlaze/PicoBlaze using XPS' P* f& B- X5 {' @
Speaker: Jeremy
5 Y+ T7 f% V$ r. u+ J% }  [Contents: XPS design flow, compile your embedded combine with ISE and XPS, generate your free 8 / 32 bits CPU for your design.
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4 z  \. X& f# x0 {2 \; QEDK(II): hardware software co-design using XPS1 f& a) U2 X: z& h
Speaker: Lilian& V  Z; A% R, |' g  t5 A, k
Contents: Connect your own IP to MicroBlaze OPB / PLB bus, debugging / porting and developing your C code / AP for your embedd
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Memory controller: MIG, MPMC26 U1 R( e1 W! P4 y
Speaker: Lilian3 k1 l+ Q/ I% K# T/ l/ E7 f' N3 I
Contents: Xilinx memory solution, Xilinx free DRAM controller and HOWTO, LAB
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ISE(III): Advanced ISE UCF script and command line batch file coding: A, h5 O/ Z, W# A% i; D/ v5 s, Z
Speaker: Frank5 _, K7 M" T+ D9 K; \
Contents: script instructions and how to build a professional project
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High speed IO: RocketIO and LVDS high speed IO applications" K1 t9 Z: \( v
Speaker: Jeremy9 d$ J9 E9 t& C  f$ ~# C
Contents: PCEe, SATA, MGT, LVSD it’s application and HOWTO
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