The wholechip floorplan is very important before you start the layout.6 T7 k' b* b! {# S+ S0 q# O8 ~% G
Then the position of output pin are fixed for each sub block,and the line drawing will be smooth. # I0 E: P( ]3 ?' E7 ~# L- }" ^Finally,the drc & lvs could be so easy to do . 6 F. T% j: G0 i9 Y+ o/ pBut the floorplan must be verified by designer.The thing of re-layout almost have not be happened.