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PrimeCell Fabric IP
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6 m" x \/ D& b3 X9 i/ O2 gPrimeCell Peripherals5 ~6 E3 @8 y% V$ e/ M
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ARM PrimeCell Peripherals are re-usable Intellectual Property (IP) macrocells developed to enable the rapid assembly of System-on-Chip designs. Ready to use, fully verified and compliant with the AMBA on chip bus standards, the ARM PrimeCell range is designed to provide right first time functionality, high system performance and best value IP to designers.
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Using the ARM PrimeCell Peripheral range can help you to save considerable development time and cost by concentrating your resources on developing the complete solution rather than designing generic functionality devices. ARM PrimeCell Peripherals provide designers with a library of proven functionality that works reliably, and affordably, "Out Of The Box".
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# L. T1 L" X- H5 ?: j% XOverview
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5 S+ i$ p& \* d' H9 p. H! i! H' WHighest quality ready to use soft IP macrocells/ r y) ]7 y- d* J6 M
Industry standard AMBA compliant
1 y' R+ h+ g" {3 o, X! s! o3 ZRoyalty-free & affordable licensing 6 ?6 p7 _! ~- e# U# R, |& w" ^
Proven in existing System applications
4 @9 I2 B! v eDeveloped to strict design guidelines ensuring easy integration & reuse
8 D' N4 r2 H( VExtensive & detailed documentation
, ]2 V, A7 |1 v$ IComprehensive support network
6 ?1 @4 G8 g7 `7 m" u& VCompatible with industry standard tool flows
4 r3 T0 R4 K# V) R" v dEvaluations & full licences available today \+ U) r1 y, X
& Y6 x' t7 K1 k3 c, wPrimeCell Peripherals cover the full set of AMBA standards and their functionality targets a broad range of purposes from very high performance through to simple I/O. For example: + \+ h. r" \ Y
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Interconnect Generation i. o! ?/ T' S* F' }
Memory Controllers
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Level-2 Cache Controllers 4 d8 k4 ]3 p( }7 K; o3 o
LCD Controllers
( |' Q& c1 y) F% e3 c- I' dInterrupt Controllers
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[ 本帖最後由 masonchung 於 2007-5-13 11:37 AM 編輯 ] |
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