STD Cell Data Prepare 中 wire track 的問題?

hgby2209

Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack  
# b% \$ k( W( M  M7 K之後卻有如下之 Meaasge:
8 N1 j( k0 y# E, g1 S; D
6 C, h' l4 d3 |5 ~% ^$ O******** Pin Access Analysis *******
** # Cell Masters    =  1000
, d# |" c& f7 v' l9 L! ?* {** # Ports (logical) = 2500
( Y8 H) b8 g7 Z8 o: B8 E, m** # Pins (physical) = 2500
** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
% y# S) [# J4 P9 E( K** # Pins with no good access point on Ver-Grid =    5 ( 0%)
+ |) g1 l! w& m" b; V
) X: j+ s3 e, T* n+ t! F0 n$ O請問下面這兩句是代表什麼意思呢?
** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
. m' B' h5 {# s; F$ ?. H/ s: R** # Pins with no good access point on Ver-Grid =    5 ( 0%)

% a! k8 w/ ~% U3 G若是代表有錯誤的話是否要 Fix 呢?