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做fpga的前途問題

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1#
發表於 2013-2-27 13:48:38 | 顯示全部樓層

Altera和台積公司繼續長期合作

2013年2月26日,台灣——Altera公司(NASDAQ:ALTR)和台積公司(TSMC)(TWSE:2330、NYSE:TSM)今天再次強調雙方將繼續長期合作,為FPGA創新設立新里程碑。台積公司是Altera的主要晶圓代工廠,提供多種製程技術實現Altera的系列產品,包括,即將上市的20 nm產品、現有的主流產品,以及傳統的長壽命週期零組件等。
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Altera在開發下一代製程技術產品上與台積公司進行了深入合作。Altera的下一代主要產品系列採用了台積公司的高性能價格比20SoC製程,以最佳化功率消耗和性能,雙方將實現多項重大產品和技術創新。Altera會繼續在其可訂製產品系列中採用未來的台積公司製程技術,以滿足各類終端應用的性能、頻寬和功率效益需求。
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" R0 b) O+ P) X2 X8 GAltera公司總裁、執行長暨董事長 John Daane評論表示:「在我們長達20年的合作中,Altera與台積公司在業界樹立了多項里程碑,這對雙方都非常有益。台積公司仍然是我們未來產品開發最重要的合作夥伴。我們期望繼續密切合作,聯合開發下一代產品技術。」
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台積公司董事長暨執行長張忠謀博士補充表示:「長久以來,Altera公司與台積公司合作無間,已經為無晶圓廠及專業積體電路製造服務公司之間互相扶持,成長茁壯,進而在半導體產業中展現堅強實力的合作模式樹立了典範,倘若沒有Altera公司如此優異的客戶做為夥伴,台積公司無法成就今日的地位,因此,我堅信雙方未來的夥伴關係勢必益形鞏固且蓬勃發展。」
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2#
發表於 2014-7-25 10:56:53 | 顯示全部樓層
Job Title hysical Design Engineer  Y2 ~/ m7 M6 D( k
Job Category :IC Digital Design
' m$ X' L' j" h$ u; jLocation : Singapore
* b5 n, I5 _& W, J: ?; a5 FJob Type : Permanent
& x- w6 x7 T# G2 K4 yJob Description:
; B' p- T. [8 P- ILooking for Physical Design Engineer (Technical Consultant) in a company offering hands on experience and international exposure.
+ t* `( e+ b, M; P  K7 q3 w. W
2 n5 b* I" b7 C  t! a: S% Y1 U! LResponsibilities:
6 N# K) x9 e- a. o) {* U0 r) X6 YTo take full ownership of the Back-end Design, from netlist to GDS II2 E# _+ q7 ~3 c% R( g
Able to handle the process - synthesis, scan insertion, floorplanning, critical path timing analysis
( W8 X# o1 \2 A& |, N: gManage the steps - place & route, equivalence check and STA
  A4 J3 s# [. h' |6 g2 k' F$ I: rPerform the physical verification upto signoff - LVS/ DRC- t' u2 ]9 b1 a4 F7 }# H2 Y

0 p$ l9 y% o0 U/ L5 _+ O+ x* M" mRequirements:
5 W9 _% G% C% t+ |Minimum 3 years experience in a hands on Physical Design role, i1 `8 T& G! ]: U/ v7 p9 g8 U
Handled full responsibility of STA, floorplanning, CTS and placement
$ V1 g* v+ A1 q( BWell versed in ICC Synopsys/ Encounter/ Calibre
9 Y* N* n/ {$ r" X9 qBachelor in Electronics, Master in Electronics preferred! C6 q9 @6 o1 d9 ?. r. X4 l7 `
Dynamic, highly motivated individual with a positive attitude and strong desire to be successful. Z$ k- a0 f: V, q& ]- v
Singaporeans / PRs only
8 X4 _( t. t2 U7 t. ]  W* L* R5 day week, Mon to Fri 9:00 AM to 6.00 PM, P! q. Z- p* e6 j6 ]6 ~
Fixed salary package - with attractive benefits& b7 H1 j$ M. x3 O) g! J7 t3 Z/ D
Relocation support provided
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3#
發表於 2014-7-25 10:57:17 | 顯示全部樓層
Job Title : Senior Physical Design Engineer* \. y$ |6 g( S  }' K0 I* o
Job Category :IC Digital Design
" `; a  z5 f* O4 Z0 cLocation : Singapore8 A6 X+ K) z2 y) T! Q5 X6 H/ o
Job Type : Permanent: m0 ?* C. I+ V0 C; m4 T
Job Description:2 C# n  `! H$ j! G8 y
Looking for Physical Design Engineer (Technical Consultant) in a company offering hands on experience and excellent exposure.
% }0 W! ~5 Z/ S' t, Z# x- Z! y( `' I* N- w4 P5 j- g
Responsibilities:% `0 D9 V: w) r9 R7 v. h4 `
To take full ownership of the Back-end Design of complex chips, from netlist to GDS II
: j; J; S- ?2 |# K  {( Q2 E& j5 jAble to handle the process - synthesis, scan insertion, floorplanning, critical path timing analysis" n, N; N5 W1 R' d7 M
Manage the steps - place & route, equivalence check and STA
1 p! W7 `) R( X: e: iPerform the physical verification upto signoff - LVS/ DRC; N+ Y9 X) F, ?; n5 A9 `3 q

9 [2 X; j# @/ W% w+ g. I! \Requirements:+ y! y+ Q. r9 w* A" R; K# ]
Minimum 6 years experience in a hands on Physical Design role1 B2 k7 s; Q$ P
Handled full responsibility of STA, floorplanning, CTS and placement* ^% d4 D/ N$ n  `. v: x$ \
Well versed in ICC Synopsys/ Encounter/ Calibre1 o& E# l' ~2 u, [: x, D" V( Q
Bachelor in Electronics, Master in Electronics preferred0 k5 l" {/ I* h& c8 I
Dynamic, highly motivated individual with a positive attitude and strong desire to be successful
& n* A/ T; p4 C2 C% ]$ l5 vSingaporeans / PRs only
: ~1 {0 A  G( l- S5 day week, Mon to Fri 9:00 AM to 6.00 PM3 }) y: v0 g- r" I% h; V$ l
Fixed salary package - with attractive performance incentive+ Z$ m# i3 J2 c, g; I' `  Q( R1 w: m
Relocation support provided
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