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Sr. ASIC Design Engineer (encoder/decoder)
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公 司:a leading developer of advanced digital imaging solution) ?0 {2 q# H! K% \3 D
工作地点:上海
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5 F- }" f( P' l" |2 dPosition Overview: The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for XX''s future generation multi-media products. 9 P7 a. t6 U" g2 j1 t- |+ k* v
3 `: T$ r1 y6 o7 v+ w主要职责 (70%) 8 d e, B* i' `" `0 ]& b6 A7 D8 r
In-depth knowledge of TV encoder and decoder design. Good understanding of TV system design.
9 E* K* p9 |7 c( R- D4 FProficiency on digital filter algorithms and hardware implementation.
! s& R6 A( J8 C; Y1 V! R' tDevelopment and verification of complex IP module, integration of the IP module into the Soc devices, top-level design handling, system level testing.
# s" G+ k& D$ A0 L* r" K* I; w/ a+ SParticipate in the FPGA platform development and lab debugging
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3 P" O c% V z0 G# @7 {其他职责 (30%)
l3 w$ i. \8 `0 ^, x _Participate in block level architecture design Assisting embedded FW development.8 Z9 ~, w- P) w: X7 N, N# _
职位要求
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经验/技能
# D. q+ l* B+ ]: f/ s9 c1. Strong knowledge of TV technologies, knowledge of image signal process and CCTV system is a plus 5 R0 F3 T) u) I4 N; ^2 u2 w
2. Strong knowledge of ASIC design flow. Can define Micro-architecture of the IP module and /or sub-blocks. And able to write detailed engineering specifications.
5 J j) {) X; s( d) o. e3. Good communication skills, especially in technical writing and reporting;
% W8 x. q4 X; ?& \! z4. Self-motivated and ability to excel in a team environment.
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! S! T$ h+ H" e: M1 K教育 D0 r l/ p' k( ]+ X k: p* |
MSEE/CE with 3+ years of industry experience |
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