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Sr. ASIC Design Engineer (encoder/decoder)' m7 _5 r; t; H& u. y
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公 司:a leading developer of advanced digital imaging solution, p+ x5 h* |! U) _/ ~
工作地点:上海* M& m' E7 D, I+ B5 K `9 ]$ d
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Position Overview: The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for XX''s future generation multi-media products.
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主要职责 (70%) : F# S* I$ c% k/ ~2 N1 n) e% u. N5 d; n
In-depth knowledge of TV encoder and decoder design. Good understanding of TV system design. , u4 R/ E- R" |% b+ ?
Proficiency on digital filter algorithms and hardware implementation.
2 r+ |2 \+ K& u% w! v4 BDevelopment and verification of complex IP module, integration of the IP module into the Soc devices, top-level design handling, system level testing.
) n, X6 E! V" o9 n) P6 D# ?Participate in the FPGA platform development and lab debugging
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其他职责 (30%)
5 Z# Z2 I( n* [5 \9 N- ~+ L2 cParticipate in block level architecture design Assisting embedded FW development.
2 B5 T9 v9 G. Y8 y2 o职位要求
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经验/技能 : s# E- u& s5 W* K! `; j6 R% I
1. Strong knowledge of TV technologies, knowledge of image signal process and CCTV system is a plus
+ V% E8 T: y/ i2 t7 y+ Q8 ]2 P) M2. Strong knowledge of ASIC design flow. Can define Micro-architecture of the IP module and /or sub-blocks. And able to write detailed engineering specifications.
; X3 ] i- C2 Z7 ~0 {& ?: Z3. Good communication skills, especially in technical writing and reporting;
- c6 g3 k( K& A$ @4 d8 h$ q4. Self-motivated and ability to excel in a team environment.
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教育 ; ?( d8 b2 {) @9 }
MSEE/CE with 3+ years of industry experience |
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