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· Understand the custom requirements of a Complex ARM based FPGA design which includes: ARM boot-up requirement, complex clock tree scheme, RAM/ROM inferring, and some basic analog blocks/interface like PLL. Experience with Radio RF will have an added advantage. · Ability to translate ASIC design into FPGA by translating clocks, RAM/ROM and other essential analog block to equivalent FPGA device components and requirements · Familiar with Synthesis with Synplify with clear understanding the interface/timing constraints, and ability to clean all timing issues before P&R phase. · Familiar with FPGA tool to ensure bit file generation fits the size, performance and I/O of the design. · Understand FPGA board requirements and co-design with HW team · Responsibility to verify the netlist so that it will be fully functional when downloaded on FPGA board. ' @# o6 h p0 e# Y5 ^6 W
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Requirements: · Candidates must have at least 4-6 years of relevant experience. · Master’s/Bachelor’s Degree in Electrical/Electronic Engineering with an emphasis in IC design · Must be familiar with Xilinx and Altera devices and their tools · Must be familiar with Synplify synthesis tool · Must be able to understand and debug FPGA boards. · Must understand tcl/shell scripts to construct or modify constraints files. · Knowledge about complete life cycle of IC and FPGA development. · Knowledgeable in digital High Speed GHz frequency design and RF Radio is an added advantage · Knowledgeable of ARM based SoC design is an advantage · Good written and communication skills · Experience in WLAN, BlueTooth, GPS, NFC, FM or Modem (LTE, TD-SCDMA, WCDMA) SoC/IP design is preferred. · Experience with muli-site/multi-team/multicultural cooperation is preferred |
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