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招聘公司:a start-up company with high performance bletooth and Wifi technology
* ]# V/ p" Z/ W5 C& f( N2 T* @1 @, E招聘岗位:ASIC Design Manager; S, \- b: w( w6 \+ ^6 T% n5 l
工作地点:Shanghai. h8 @5 s6 I! W
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Responsibilities: 1. Responsible for architecting each product, and for overseeing architecture definition, block partition, HDL code, synthesis, logic verification, system verification (FPGA), analog IP design, and static timing analysis for pre and post layout. 2. Overseeing floor planning and place & route of the chip, including IP block integration 3. Manage a group of engineers to get the product successfully developed. ; ~+ |/ \3 W* c4 l7 X8 s9 d+ E
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职位要求:& M/ W- |; F1 X1 j
Requirements: 1. 5+ years experience as an ASIC/logic designer. 2. Must understand chip design from architecture down to GDS. 3. Must have good managerial skills. 4. Must be a good team worker, possess a good personality. 5. BS/MS in EE or higher. |
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