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Sr. ASIC Design Engineer (encoder/decoder)
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' Q8 u' G4 v: [ g; s7 x2 w) o* |公 司:a leading developer of advanced digital imaging solution6 b. n! Z3 S1 l8 ]
工作地点:上海; `( P- y. A" z' K
/ E: T+ M6 l& S( ?/ r7 KPosition Overview: The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for XX''s future generation multi-media products.
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主要职责 (70%) 8 Z' D( R6 z" `$ K8 G" M/ T
In-depth knowledge of TV encoder and decoder design. Good understanding of TV system design. 3 e8 Z& ^+ q& a2 n1 B% v
Proficiency on digital filter algorithms and hardware implementation. ' I" d3 f7 ]9 |* s" Z: e
Development and verification of complex IP module, integration of the IP module into the Soc devices, top-level design handling, system level testing.
- {5 n0 ], j# N$ x) L1 |0 J7 H3 SParticipate in the FPGA platform development and lab debugging 2 y4 F: |/ S% M5 {: h+ e/ w
# a4 `7 d# l; X* w) J, H* T4 v其他职责 (30%) h9 }, V0 [4 V' u. h. j
Participate in block level architecture design Assisting embedded FW development.. R* J' p4 X3 A5 j# A0 T: i* R1 q, u
职位要求) ?, M S+ T3 [7 W" k. t; c
岗位资格
1 d5 u" _5 U7 n# ^* F经验/技能
- c" E$ }! U6 Y; C% A% R4 r1. Strong knowledge of TV technologies, knowledge of image signal process and CCTV system is a plus
c) E; j# _0 x' H+ n2. Strong knowledge of ASIC design flow. Can define Micro-architecture of the IP module and /or sub-blocks. And able to write detailed engineering specifications. % W) C+ k8 P, D* @
3. Good communication skills, especially in technical writing and reporting;
4 J2 Y% \, v" t3 a8 g* @/ b4. Self-motivated and ability to excel in a team environment. ; i1 l% ?* F! B
$ M( ?5 b% n8 h. \教育
2 Q, B- v8 |7 H+ DMSEE/CE with 3+ years of industry experience |
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