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危機就是轉機?類比IC廠逆勢擴大徵求IC設計人才?你覺得去哪家最好?

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1#
發表於 2013-11-19 08:52:27 | 顯示全部樓層
Field Applications Engineer
" E' r5 W) ~; H1 H( R. @公      司:One world top EDA company2 O, v- M* M$ o+ v
工作地点:北京
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& y& n/ R8 s+ T  O/ d2 SPosition Description:      
) _8 z" W$ _" j1 A-          The Field Applications Engineer is responsible for working directly with customers in key technical pre-sales and post-sales roles to provide architectural and design consulting on the best use of Intellectual Property software programmable cores in various different applications including Wireless Communications, Audio processing as well as Image pre and post processing in a customer''s ASIC design.
$ {% u$ ~3 P) S-          DPU cores are used by the world leading semiconductor development and supplier companies. As the Field Applications Engineer, you will be working with customers on the next generation designs. In the Wireless Communications application, customers are using cores in their 2G, 3G, 4G (LTE and LTE-Advanced) modem systems for User Equipment and Infrastructure products. You will be working with industry leading customers on their next generation designs.
; ^  D" O9 V& P0 G' {5 x7 y1 `& r: {/ C" {/ H
Responsibilities: 4 c* `2 o& J; E0 }# G# A2 w% V; v
-          Provide technical presentations, seminars, and demonstrations of products, and working closely with the field sales organization to achieve revenue targets; p3 m6 W4 Y! L
-          Fulfill a pre-sales role that includes providing technical insight about products to prospects, optimization of customer''s software code during an evaluation, and processor performance and implementation benchmarking
) F: u. U6 m7 ^8 N, ]# |+ ]9 r4 Q& p-          Manage technical accounts and champion customers’ technical issues within the company
2 \1 |; v4 F" s: E-          Primary responsibility for assigned areas and other duties as required
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- f/ G, f& _% j7 Y$ x) BPosition Requirements: # v5 W5 `& k  ^" ~/ q* |4 }
-           BS in EE/CS or equivalent and 6+ years’ industry and technology experience with 4+ years experience as a Field Applications Engineer or Applications Engineer
% Q5 D  J% k" Y( m7 g0 T-          Experience with DSP architectures, DSP filter programming
# A9 L: j: p2 t- A-          Experience and understanding of 3G and 4G PHY (Layer 1) algorithms + N: I2 H6 H- y4 u3 s: E$ u( V6 Q7 V+ S
-          Experience and understanding of ASIC SoC design and implementation is a big plus 8 D" D. o  V7 ~' n# M
-          Prior FAE/AE experience is desired. An MS in EE/CS is preferred. Some degree of travel may be involved, depending on location and need
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2#
發表於 2013-11-19 08:53:16 | 顯示全部樓層
Electronics Design Engineer
0 Q) T  A' P9 x( @% [. S公      司:an international group of companies* [9 J( b/ g& G
工作地点:汕头
2 _2 g6 r7 h5 s6 |9 d1 T% @4 q7 J8 P  {! g) l. u
Responsibilities will include
; ?; T7 M; N' ^?     Electrical design including microprocessor system from concept through to production. % P- F- P- B! F" u5 t( o8 E* Q( C
?     Schematic capture, simulation, PCB layout. 8 [' j. F8 \8 H, c( Q- _
?     Embedded software development in C / ^7 }& C. ]7 I  ~0 Q1 X
?     Design and pass appropriate EMC requirements
6 Y* l0 J) K/ U; L2 }?     Generate innovative product concepts/solutions
/ a  \5 A- [8 E  G( _8 ~?     Develop functional specifications for new products
; x# E2 a0 R# E& Q6 j?     Prepare and release of component specifications and Bill of Materials. # V& t- u# ~4 I" n& t: v7 R
?     Product test speciation including writing the spec and implementing tests + M+ N, R/ `( g" T
?     Managing / coordinating engineering changes and maintain detailed design records
' o  \+ |! ?0 y: U6 B, c) ~?     Coordinate/organize prototype builds, fault finding, samples tracking, and field evaluation for NPD
" h: s  C% t; T6 M?     provide technical support to sales, marketing, production, quality and purchasing
3 Y; X2 H  B& V- q4 ?( K0 L( r?     Working closely with the global R&D hardware / software teams ! e5 c$ y7 i$ r  V3 A: P
, C: n* C8 s: X! g' m% t9 I
Preferable Skills
0 O( v0 }, I9 z- Y7 s" G?     HW/FW technical lead in NPD process $ j0 u5 d, G' x& ~
?     Experience in the design and application of sensing technology products 5 {0 I+ U& G5 d
?     Experience in the design of Audio products and Switched Mode Power Supplies. - B. M* `; q+ }3 \) J+ H
?     Experience in infra-red and wireless technology. . u* J8 d0 K. i: l. P
?     Understanding of optical design % o; A1 D: s' Y
  s0 h& i' x; y* r( C1 M2 L( B! ^
Benefits: # R  `, K5 v0 D% T
?       Competitive salary. " c4 ~8 R/ A4 ]) W  }
?       Contributory pension.
4 x2 r4 [2 G' O: N
8 X2 ]8 A. ^3 ?# o) b+ U  R  IThis is an exciting opportunity for a pro-active and highly motivated individual who is driven, ambitious and can make a positive impact to the future of **
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3#
發表於 2013-11-19 08:56:08 | 顯示全部樓層
EE (Electrical & Signal)3 E8 b) X# P' E, _9 d
公      司:an international group of companies
1 k. G8 j& D8 x: F工作地点:上海' Z8 i, {$ Q# d

4 M$ Y7 A4 X5 \2 s/ uDUTIES AND RESPONSIBILITIES
  c+ A' Z) d* ~2 H2 e·         Electrical design from concept through to production.
4 s; j6 M, ^- g·         Analogue and Digital Electronic circuit design experience is essential.
+ v* a: u3 z0 i1 y) e·         Participate in or lead a large project entirely. ; i8 h; l, R; \4 F5 `
·         Able to manage designs and projects from requirements through to manufacture. * Q2 I  C7 }, l, ]1 o2 h
·         A good understanding of design for manufactures and test methodologies.
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( m" v7 @/ v3 U* u' [  ]KNOWLEDGE, SKILLS, AND ABILITIES REQUIRED:
$ G) X1 ^0 }. l6 \' @·         Bachelor degree, relevant major.   c$ n7 j8 e/ o* K0 m6 \( y
·         Must be able to work both independently and as part of a team.
; `% |! E) @8 m/ w·         Minimum 5 years’ experience in analogue and digital electrical circuit design for mid / high volume products., i( M9 e+ W* g- @
·         Experience in communication with PCB manufacturing suppliers.
0 O& k3 A- a5 F( v9 ]! `* F$ H; J·         Must be pro-active and results driven % i+ Z9 y* o: G% M
·         Experience in optical industry is a strong plus.
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4#
發表於 2013-11-19 08:57:00 | 顯示全部樓層
Applications Engineer/ Application Manager2 r/ ~3 ^( B2 y

; u7 w$ v+ j1 j7 n公      司:A famous power IC company4 \3 p- ]/ N  z1 Z! X% k
工作地点:深圳- h! |1 G, `  f/ `

+ @+ V* d, |: p5 @- y( L0 f, dJob Description:  1 d+ d/ H- O0 H
The Applications Engineer/ Manager will be responsible for switching power supply design in all field related to application engineering. This position is located in Shenzhen, China.. J- e  o6 v" c/ o

0 [! T7 t0 R5 P) F0 a) GJob Responsibilities:   O8 d4 J: @4 O3 l. @
1. Provide PI solution with demo board design and engineering report.
# ?+ [) Y4 y( ]4 F$ o, F) R( J2. Design and develop switch power supplies using the company’s products for reference designs, design ideas, data books or customer requirements. These designs will need to meet all aspects of power electronics design including EMI, thermals, safety, etc.+ c! P  s* |' Y, p) X
3.  Provide switching power design support and technical advice to the company’s customers/Disty mainly in China.0 ?7 Y  V; B! C
4.  Test and analyze competitor’s solutions. : Z1 f5 ^: r: V: O- ?. F( ^2 F; J
5. Support customer projects in close cooperation with the xx China sales and FAE teams.6 v! r% ?* g% i7 X  X! m$ O

' U$ X) {1 }5 |; R% _- S! ]2 BRequirements: + A$ y; K0 r; M* U2 M' ?. i
1. MSEE/BSEE or equivalent with emphasis on electronics. 0 ^+ p3 W; r  J9 ~! [' i
2. A minimum of 5 years of hands-on experience in (AC-DC) high power switch mode power supply design or related filed in power electronics industries. 2 a4 O; y) S8 g8 q
3. Team player. . _% U/ U# Y8 Y6 J, D# p4 h+ n1 i* O0 ]4 K
4. Moderately fluent English (second language) – reading, writing, and speaking.
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5#
發表於 2013-11-19 08:58:41 | 顯示全部樓層
analog engineer
) B& l( q3 _+ e$ T( f, d6 F0 t& d公      司:a top 15 semiconductor company
& ?' l# h* c3 v, n  B工作地点:上海: ?- K4 m% a* q: |& o! J% ]! v) K
% w! b) f% ]; d2 E
Job Description:  
* l5 O* w: o2 |( k4 z5 C" v* G& _; o# ETake charge of Key IP development for analog/mix-signal IC design project ensure the quality;
1 |9 {2 |( J, m2 m7 oProvide technical guidance  to layout; application and evaluation teams;
, P+ U$ g5 r1 `, Q: n3 O3 h1 rEngage with the whole project team to understand the product requirements/block requirement, and provide insights of the technology trends;
8 S$ w- j$ U3 Z) g3 {" d' vDeliver the design documents including the design SPEC, review files, evaluation plan - T3 e& b. I# N! J+ D. t
Capable for debugging and bench evaluation
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Requirement:  2 N: Z: {; a8 @& Q# E' N
Solid understanding on analog circuit analysis, verification and IC design technology ) D$ d( w, Q. T6 f
Experience using analog simulation tools  
' V0 X# d/ T7 yGood silicon debug capability 3 \4 S; w) v+ _9 f$ W) }, |4 n
Excellent verbal and written communication skills  
0 Z# d. Y' Y  u* kAbility to work effectively within a team environment  ( N; O/ B! X8 _  J9 L
  
# |' g- _9 p1 `: a0 I$ OQualification:  $ [' ^9 `/ P: C" m
MS degree with 3+ years experience in IC industry " P  ^. T9 ]: R
ADC related products experience is preferred
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6#
發表於 2013-11-19 08:59:22 | 顯示全部樓層
Staff Analog Design Engineer" j  a8 n, {' B) O, F; U% P
公      司:one famous IC company
: s1 m$ Q$ f/ m" ]% B5 E工作地点:上海
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' g- p! a* c: b9 Bob Description: 5 x! e" c) X8 j- K: I) @+ M( Y+ Y
Collaborate with *** CAD teams to develop industry leading design flows and methodologies for analog and mixed-signal designs using nanometer technologies, with emphasis on improvement of layout productivity of analog circuits, including usage of advanced Cadence IC6.1 features, design for manufacturing (DFM), metal fill, physical verification and tapeout flows. Write scripts and utilities to enhance these design flows. Provide CAD support and methodology training to *** design and layout community. Write application notes and document ***’s analog/mixed-signal CAD flows. Work with EDA vendors to drive ***’s interest with regard to analog/mixed-signal tools., |# E4 w; @/ T; J0 S3 v

1 X! \. e' {& v' z* ^" Q  cQualifications: % D( B( a6 ]+ I6 T9 |) @
-         BSEE or above, with 3~5 years relevant industry experience.
$ e" i* b9 [  G$ m, l-         Solid understanding of advanced semiconductor process technologies
4 R) B6 _! P  G8 m  v' x+ u-         In depth familiarity with layout of analog and mixed signal circuits including knowledge of layout effects (i.e. matching, reliability etc.) and DFM rules for advanced technology nodes) [( B) \7 m+ q
-         Understanding of nanometer design rules and physical verification runsets 3 |) E( B& @! C8 c" ~4 X
-         Solid knowledge of Cadence DFII
+ `% y6 o! k2 }6 @* B3 s-         Knowledge of physical verification tools like Mentor Graphics’ Calibre
+ w+ D, ~: B' l# J9 l-         Knowledge of Skill, perl or other programming languages
, z, I+ }! L6 `-         Strong written and verbal communication skills
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