危機就是轉機？類比IC廠逆勢擴大徵求IC設計人才？你覺得去哪家最好？

ranica

Product Engineer -QA
公      司：A famous IC company
工作地点：上海
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, T, W/ L2 G4 M( m" rPosition Summary:
Essential Job Functions/Accountabilities:
Work closely with RD and PE team to  
Make sure product (software) quality
: [; J: }2 O/ D9 w0 wQA system maintain and improvement
Daily build and daily regression test
Project management and risk control
Bug/enhancements verification and testing
, f) V% I. M5 C$ s" M* X) i8 ?: wProduct release and documentation
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# e8 ^% p7 U! u% BMinimum Requirements/Qualifications:
Strong scripting skill, Perl/TCL and LINUX shell required
Experience of SPICE-based(HSPICE/Spectre/Eldo) circuit simulation
Experience of package and PCB modeling and simulation with field solvers
Knowledge of High-Speed I/O (DDR) power and signal integrity analysis
" E, A  F3 o! L3 x* kKnowledge on die and IO ring physical design, LEF/DEF/GDS is a plus
B.S. in Electrical Engineering or other related areas, 3 years of experience
5 p1 V- z+ k- P5 Q% F3 cM.S. or Ph.D. in Electrical Engineering or other related areas, 1 years of  experience, or equivalent combination of education and experience
Self motivation, teamwork and strong English communication skills ( both written and oral )

ranica

Sr. Software Engineer-电路仿真和建模

6 G; t8 \4 v  ^1 {5 X2 Q公      司：A famous IC company
工作地点：上海

Position Summary:  
Software development and product engineering for power and signal integrity analysis and modeling
Essential Job Functions/Accountabilities:
Maintain the IC-package power and signal integrity modeling software, conduct bug fixing and enhancements; develop new features to expand the application and improve the accuracy, capacity and speed; perform development level testings and work with application engineering team to resolve customer issues;

Minimum Requirements/Qualifications:
) H6 G, O& ]0 f' BStrong experience in software development using C/C++
Strong working knowledge in linear and non-linear electric circuit network analysis and modeling
Knowledge ofSPICE simulation, or on-die and package extraction is a plus
Excellent communication (both written and verbal) skills in English
MS, Ph.D. in Electrical Engineering, Computer Science, Physics/Math or related fields

ranica

Product Engineer
4 F' x4 T4 o" Z: p$ h公      司：A famous IC company
4 I- f6 k0 d/ @工作地点：上海

2 s3 q4 y& S7 e6 j1 `& p职位描述
Ideal candidate will have completed BSEE , with 5 to 10 years experience in
1 \, ?! ]3 H5 cSemiconductor field.

. s; D7 {# j1 G, R9 v Candidate should have strong oral and written communication skills -must be english speaking.

: e. `0 u# W5 h, n' E' h" G6 ] Candidate must have demonstrated strength with analog circuits, and familiarity with typical lab equipment such as scopes, DVM’s, curve tracers, and function generators. Strong bench skills are mandatory.
: F5 i$ Y& U, h9 Q, G* `
; o" [: I- J2 x' T* g+ Y1 m Ideal candidate will also have ability to debug IC’s to component level from design schematics and plots.

6 X8 |# j) t2 p( B0 \- |+ S Failure analysis background is a plus.

+ W0 _( ^# f' [3 C8 [& I Candidate must also have ability to follow documented procedures, and must be able to work independently. Individual will report to management team in US.
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Job function to cover all aspects of New Product Development and Yield management,including bench-to-tester correlation, tri-temp characterization using ATE equipment, trouble shooting and yield management

ranica

高速模拟集成电路设计工程师
/ h" E$ V" j2 y公      司：A semiconductor company
工作地点：上海

; `& F; N. y% `' ~6 [职位描述：  
1、负责高速模拟电路的设计、开发、优化；  
2、版图的设计及验证；  
$ k  V9 d5 u# {3、电路版图参数的提取及后仿真；  
" s" b& L0 s* E, s# Q4 H4、芯片的测试和分析。

  |. c4 g. d0 q% c2 W- ]职位要求：
1）微电子、集成电路相关专业硕士或博士学位，或学士学位3年以上模拟IC设计经验；  
! ~; w: t% r: K9 Z. s5 C8 B& }2）熟悉和掌握模拟集成电路及版图设计的原理与技巧；  
! J2 y8 R$ I9 |: X3）有通信系统用集成电路芯片设计和成功投片经验；  
; A0 z, ^$ k7 g3 R7 w6 @" p4）善于沟通、工作踏实、责任心强，具有良好的团队协作精神；  
3 A* V" u+ g: ]5）有下述项目经验者优先：高速锁相环(PLL），时钟数据恢复电路(CDR），调制驱动电路，宽带放大器，限幅放大器，跨阻放大器等；